AD9204-20(RevA) 查看數據表（PDF） - Analog Devices

零件编号

产品描述 (功能)

生产厂家

AD9204-20
(Rev.:RevA)

10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

Analog Devices 

AD9204

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

General Description ......................................................................... 3

Specifications..................................................................................... 4

DC Specifications ......................................................................... 4

AC Specifications.......................................................................... 5

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 7

Timing Specifications .................................................................. 8

Absolute Maximum Ratings............................................................ 9

Thermal Characteristics .............................................................. 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 12

AD9204-80 .................................................................................. 12

AD9204-65 .................................................................................. 14

AD9204-40 .................................................................................. 15

AD9204-20 .................................................................................. 16

Equivalent Circuits ......................................................................... 17

Theory of Operation ...................................................................... 19

ADC Architecture ...................................................................... 19

Analog Input Considerations.................................................... 19

REVISION HISTORY

9/2016—Rev. 0 to Rev. A

Changes to Figure 3 .......................................................................... 7

Changes to Clock Input Options Section .................................... 24

7/2009—Revision 0: Initial Version

Data Sheet

Voltage Reference ....................................................................... 22

Clock Input Considerations...................................................... 23

Power Dissipation and Standby Mode .................................... 25

Digital Outputs ........................................................................... 26

Timing ......................................................................................... 26

Built-In Self-Test (BIST) and Output Test .................................. 27

Built-In Self-Test (BIST)............................................................ 27

Output Test Modes..................................................................... 27

Channel/Chip Synchronization.................................................... 28

Serial Port Interface (SPI).............................................................. 29

Configuration Using the SPI..................................................... 29

Hardware Interface..................................................................... 30

Configuration Without the SPI ................................................ 30

SPI Accessible Features.............................................................. 30

Memory Map .................................................................................. 31

Reading the Memory Map Register Table............................... 31

Open Locations .......................................................................... 31

Default Values ............................................................................. 31

Memory Map Register Table..................................................... 32

Memory Map Register Descriptions........................................ 34

Applications Information .............................................................. 35

Design Guidelines ...................................................................... 35

Outline Dimensions ....................................................................... 36

Ordering Guide .......................................................................... 36

Rev. A | Page 2 of 36

Share Link: