LC72722PMS 查看數據表（PDF） - ON Semiconductor

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LC72722PMS

RDS/RBDS Single-chip Signal Processor IC

ON Semiconductor 

LC72722PMS

CCB output data format

1. Each block of output data consists of 32 bits (4 bytes), of which 2 bytes are RDS data and 2 bytes are flag data.

2. Any number of 32-bits output data blocks can be output consecutively.

3. When there is no data that can be read out in the internal memory, the system outputs blocks of all-zero data

consecutively.

4. If data readout is interrupted, the next read operation starts with the 32-bit data block whose readout was

interrupted. However, if only the last bit is remaining to be read, it will not be possible to re-read that whole block.

5. The check bits (10 bits) are not output.

6. The data valid (OWD) must not be referred to.

7. When the first leading bits are not “1010”, the read in data is in invalid, and read operation is cancelled.

CCB address 6C

B BB B AA A A

DI

0 12 3 01 2 3

00110 110

Output data / first bit

Last bit

DO

1

0

1

0

O

W

D

B

2

B

1

B

0

R

E

R

F

1

R

F

0

AS

RY

IC

E

2

E

1

E

0

D

1

5

D

1

4

DD

11

32

D

1

1

D

1

0

D

9

DDDD

8765

D

4

DD

32

D

1

D

0

(8) RDS data

(7) Error information flags

(6) Synchronization established flag

(5) ARI(SK) detection flag

(4) RAM data remaining flags

(3) Consecutive RAM read out possible flag

(2) Offset word information flags

(1) Offset word detection flag

Fixed pattern (1010)

(1) Offset word detection flag (1bit) : OWD

OWD

1

0

Offset word detection

Detected

Not detected (protection function operating)

(2) Offset word information flag (3bit) : B0 to B2

BBB

210

000

001

010

011

100

101

110

111

Offset word

A

B

C

C’

D

E

Unused

Unused

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