AD7249 查看數據表（PDF） - Analog Devices
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AD7249 Datasheet PDF : 14 Pages
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AD7249
Pin
Mnemonic
11
REFOUT
12
REFIN
13
ROFSB
14
VOUTB
15
AGND
16
CLR
17
BIN/COMP
18
DGND
19
SDIN
10
LDAC
11
SCLK
12
SYNC
13
VDD
14
VOUTA
15
VSS
16
ROFSA
PIN FUNCTION DESCRIPTION (DIP & SOIC PIN NUMBERS)
Description
Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the
part using its internal reference, REFOUT should be connected to REFIN.
Voltage Reference Input. It is internally buffered before being applied to both DACs. The nominal
reference voltage for specified operation of the AD7249 is 5 V.
Output Offset Resistor for the amplifier of DAC B. It is connected to VOUTB for the +5 V range, to
AGND for the +10 V range and to REFIN for the –5 V to +5 V range.
Analog Output Voltage of DAC B. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and –5 V to +5 V.
Analog Ground. Ground reference for all analog circuitry.
Clear, Logic Input. Taking this input low clears both DACs. It sets VOUTA and VOUTB to 0 V in both
unipolar ranges and the twos complement bipolar range and to –REFIN in the offset binary bipolar
range.
Logic Input. This input selects the data format to be either binary or twos complement. In both uni-
polar ranges natural binary format is selected by connecting this input to a Logic “0”. In the bipolar
configuration offset binary format is selected with a Logic “0” while a Logic “1” selects twos complement.
Digital Ground. Ground reference for all digital circuitry.
Serial Data In, Logic Input. The 16-bit serial data word is applied to this input.
Load DAC, Logic Input. Updates both DAC outputs. The DAC outputs are updated on the falling
edge of this signal or alternatively if this line is permanently low, an automatic update mode is se-
lected whereby both DACs are updated on the 16th falling SCLK pulse.
Serial Clock, Logic Input. Data is clocked into the input register on each falling SCLK edge.
Data Synchronization Pulse, Logic Input. Taking this input low initializes the internal logic in readi-
ness for a new data word.
Positive Power Supply.
Analog Output Voltage of DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and –5 V to +5 V.
Negative Power Supply (used for the output amplifier only) may be connected to 0 V for single sup-
ply operation or –12 V to –15 V for dual supplies.
Output Offset Resistor for the amplifier of DAC A. It is connected to VOUTA for the +5 V range, to
AGND for the +10 V range and to REFIN for the –5 V to +5 V range.
PIN CONFIGURATIONS
(DIP and SOIC)
REFOUT 1
16 ROFSA
REFIN 2
15 VSS
ROFSB 3
14 VOUTA
VOUTB 4 AD7249 13 VDD
AGND
5
TOP VIEW
(Not to Scale) 12
SYNC
CLR 6
11 SCLK
BIN/COMP 7
10 LDAC
DGND 8
9 SDIN
–4–
REV. D
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