74AHC594PW-Q100 查看數據表（PDF） - NXP Semiconductors.

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74AHC594PW-Q100

8-bit shift register with output register

NXP Semiconductors. 

Nexperia

74AHC594-Q100; 74AHCT594-Q100

8-bit shift register with output register

7. Functional description

Table 3. Function table[1]

Input

SHCP STCP SHR STR DS

X

X

L

X

X

X

X

X

L

X

X



L

H

X



X

H

X

H

X



H

H

X





H

H

X

[1] H = HIGH voltage state;

L = LOW voltage state;

 = LOW to HIGH transition;

X = don’t care;

NC = no change;

Output

Q7S Qn

L

NC

NC L

L

L

Q6S NC

NC QnS

Q6S QnS

Function

a LOW-state on SHR only affects the shift register

a LOW-state on STR only affects the storage register

empty shift register loaded into storage register

logic HIGH level shifted into shift register stage 0. Contents of all

shift register stages shifted through, e.g. previous state of stage 6

(internal Q6S) appears on the serial output (Q7S).

contents of shift register stages (internal QnS) are transferred to

the storage register and parallel output stages

contents of shift register shifted through; previous contents of the

shift register is transferred to the storage register and the parallel

output stages

SHCP

DS

STCP

SHR

STR

Q0

Q1

Q6

Q7

Q7S

Fig 8. Timing diagram

mbc323

74AHC_AHCT594_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 4 July 2013

© Nexperia B.V. 2017. All rights reserved

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