UPD16431AGC-7ET 查看數據表（PDF） - NEC => Renesas Technology

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UPD16431AGC-7ET

1/2, 1/3, 1/4-DUTY LCD CONTROLLER/DRIVER

NEC => Renesas Technology 

µPD16431A

CONFIGURATION OF SHIFT REGISTER

Two shift registers, an 8-bit command register and a 56-bit display register, are provided. The first 8 bits

of input data are recognized as a command and are sent to the command register, and the 9th bit and those

that follow are recognized as display data and are sent to the display register.

8-bit shift register

MSB

LSB

MSB

56-bit shift register

b7

b0

Command

LSB

SEG56/LED8

Display data (LCD, LED)

SEG1

Transfer direction

The meaning of the display data is as follows:

LCD: 0 → off, 1 → on

LED: 0 → on, 1 → off

Be sure to transfer 56 bits of display data.

CONFIGURATION OF OUTPUT LATCH

MSB

SEG56/LED8

SEG56/LED8

SEG56/LED8

SEG56/LED8

LSB

SEG1 COM1 (latch addressNote: 00)

SEG1 COM2 (latch addressNote: 01)

SEG1 COM3 (latch addressNote: 10)

SEG1 COM4 (latch addressNote: 11)

Note Bits b3 and b4 of status command (Refer to page 8.)

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