SST25PF040B 查看數據表（PDF） - Microchip Technology

零件编号

产品描述 (功能)

生产厂家

SST25PF040B

4 Mbit 2.3-3.6V SPI Serial Flash

Microchip Technology 

SST25PF040B

4.3.3 AUTO ADDRESS INCREMENT (AAI)

The Auto Address Increment Programming-Status bit

provides status on whether the device is in AAI pro-

gramming mode or Byte-Program mode. The default at

power up is Byte-Program mode.

4.3.4

BLOCK PROTECTION (BP3,BP2,

BP1, BP0)

The Block-Protection (BP3, BP2, BP1, BP0) bits define

the size of the memory area, as defined in Table 4-3, to

be software protected against any memory Write (Pro-

gram or Erase) operation. The Write-Status-Register

(WRSR) instruction is used to program the BP3, BP2,

BP1 and BP0 bits as long as WP# is high or the Block-

Protect-Lock (BPL) bit is 0. Chip-Erase can only be

executed if Block-Protection bits are all 0. After power-

up, BP3, BP2, BP1 and BP0 are set to 1.

4.3.5

BLOCK PROTECTION LOCK-DOWN

(BPL)

WP# pin driven low (VIL), enables the Block-Protection-

Lock-Down (BPL) bit. When BPL is set to 1, it prevents

any further alteration of the BPL, BP3, BP2, BP1, and

BP0 bits. When the WP# pin is driven high (VIH), the

BPL bit has no effect and its value is “Don’t Care”. After

power-up, the BPL bit is reset to 0.

TABLE 4-3:

SOFTWARE STATUS REGISTER BLOCK PROTECTION FOR SST25PF040B1

Status Register Bit2

Protected Memory Address

Protection Level

BP3 BP2 BP1 BP0

4 Mbit

None

X

0

0

0

None

Upper 1/8

X

0

0

1

70000H-7FFFFH

Upper 1/4

X

0

1

0

60000H-7FFFFH

Upper 1/2

X

0

1

1

40000H-7FFFFH

All Blocks

X

1

0

0

00000H-7FFFFH

All Blocks

X

1

0

1

00000H-7FFFFH

All Blocks

X

1

1

0

00000H-7FFFFH

All Blocks

X

1

1

1

00000H-7FFFFH

1. X = Don’t Care (RESERVED) default is ‘0’

2. Default at power-up for BP2, BP1, and BP0 is ‘111’. (All Blocks Protected)

DS25134A-page 6

 2012 Microchip Technology Inc.

Share Link: