FSL4110LR 查看數據表（PDF） - Fairchild Semiconductor
零件编号
产品描述 (功能)
生产厂家
FSL4110LR Datasheet PDF : 15 Pages
| |||
Typical Application Circuit
RSTR
(4)
VOUT
R1
VIN
R2
VSTR
FSL4110LR
PWM
Drain
GND
FB
RDLY
VCC
(5)
CFB
CVCC
Figure 1. Typical Application Circuit
Notes:
4. RSTR: See the functional description 1.
5. RDLY: See the functional description 3.1.
Internal Block Diagram
VCC
2
VCC
RDLY
FB
3
CFB
Internal
Bias
VBURH
/VBURL
VREF
IFB
VCC Good
Soft
Burst
VSTART
/ VSTOP
Random
OSC
VREF
SQ
3R
R
Line
Comp.
Soft-
Start
PWM
RQ
LEB
HVREG
VIN 4
VINH
VOLP
VCC
VOVP
100 ms
Delay
1.6 s Auto Restart
Timing Control
TSD
VSTR
5
Drain
6,7
Gate
Driver
RSENSE
1 GND
VAOCP
Figure 2. Internal Block Diagram
© 2014 Fairchild Semiconductor Corporation
FSL4110LR • Rev. 1.3
2
www.fairchildsemi.com
Share Link: 