LH28F016SA 查看數據表（PDF） - Sharp Electronics

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LH28F016SA

16M (1M × 16, 2M × 8) Flash Memory

Sharp Electronics 

LH28F016SA

16M (1M × 16, 2M × 8) Flash Memory

PIN DESCRIPTION (Continued)

SYMBOL

TYPE

WP

INPUT

BYTE INPUT

3/5»

INPUT

VPP

VCC

GND

NC

SUPPLY

SUPPLY

SUPPLY

NAME AND FUNCTION

WRITE PROTECT: Erase blocks can be locked by writing a non-volatile lock-bit for

each block. When WP is low, those locked blocks as reflected by the Block-Lock Status

bits (BSR.6), are protected from inadvertent Data Writes or Erases. When WP is high,

all blocks can be Written or Erased regardless of the state of the lock-bits. The WP

input buffer is disabled when RP» transitions low (deep power-down mode).

BYTE ENABLE: BYTE low places device in x8 mode. All data is then input or output

on DQ0 - DQ7, and DQ8 - DQ15 float. Address A0 selects between the high and low

byte. BYTE high places the device in x16 mode, and turns off the A0 input buffer.

Address A1, then becomes the lowest order address.

3.3/5.0 VOLT SELECT: 3/5» high configures internal circuits for 3.3 V operation.

3/5» low configures internal circuits for 5.0 V operation.

NOTES: Reading the array with 3/5» high in a 5.0 V system could damage the

device. There is a significant delay from 3/5» » Switching to valid data.

ERASE/WRITE POWER SUPPLY: For erasing memory array blocks or writing

words/bytes/pages into the flash array.

DEVICE POWER SUPPLY (3.3 V ±0.3 V, 5.0 V ±0.5 V): Do not leave any

power pins floating.

GROUND FOR ALL INTERNAL CIRCUITRY: Do not leave any ground pins floating.

NO CONNECT: No internal connection to die, lead may be driven or left floating.

INTRODUCTION

Sharp’s LH28F016SA 16M Flash Memory is a revolu-

tionary architecture which enables the design of truly mo-

bile, high performance, personal computing and

communication products. With innovative capabilities,

5 V single voltage operation and very high read/write per-

formance, the LH28F016SA is also the ideal choice for

designing embedded mass storage flash memory systems.

The LH28F016SA is a very high density, highest per-

formance non-volatile read/write solution for solid-state

storage applications. Its symmetrically blocked archi-

tecture (100% compatible with the LH28F008SA 8M

Flash memory), extended cycling, low power 3.3 V

operation, very fast write and read performance and

selective block locking provide a highly flexible memory

component suitable for high density memory cards.

Resident Flash Arrays and PCMCIA-ATA Flash Drives.

The LH28F016SA’s dual read voltage enables the

design of memory cards which can interchangeably be

read/written in 3.3 V and 5.0 V systems. Its x8/x16

architecture allows the optimization of memory to pro-

cessor interface. The flexible block locking option

enables bundling of executable application software in

a Resident Flash Array or memory card. Manufactured

on Sharp’s 0.55 µm ETOX™ process technology, the

LH28F016SA is the most cost-effective, high-density

3.3 V flash memory.

DESCRIPTION

The LH28F016SA is a high performance 16M

(16,777,216 bit) block erasable non-volatile random

access memory organized as either 1M × 16 or 2M × 8.

The LH28F016SA includes thirty-two 64K (65,536)

blocks or thirty-two 32-KW (32,768) blocks. A chip

memory map is shown in Figure 3.

The implementation of a new architecture, with many

enhanced features, will improve the device operating

characteristics and results in greater product reliability

and ease of use.

Among the significant enhancements of the

LH28F016SA:

• 3.3 V Low Power Capability

• Improved Write Performance

• Dedicated Block Write/Erase Protection

A 3/5 » input pin reconfigures the device internally for

optimized 3.3 V or 5.0 V read/write operation.

The LH28F016SA will be available in a 56-pin,

1.2 mm thick × 14 mm × 20 mm TSOP (Type I) pack-

age.This form factor and pinout allow for very high board

layout densities.

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