LH28F016SU 查看數據表（PDF） - Sharp Electronics

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LH28F016SU

16M (1M × 16, 2M × 8) Flash Memory

Sharp Electronics 

LH28F016SU

16M (1M × 16, 2M × 8) Flash Memory

DEEP

POWER-DOWN

ADDRESSES (A) VIH

(NOTE 1)

VIL

WRITE VALID

WRITE

ADDRESS AND DATA

DATA-WRITE

(DATA-WRITE) OR

OR ERASE

ERASE CONFIRM

SETUP COMMAND

COMMAND

AUTOMATED

DATA-WRITE

OR ERASE

DELAY

AIN

tAVAV

tAVWH

tWHAX

ADDRESSES (A) VIH

(NOTE 2)

VIL

tAVAV

AIN

tAVWH tWHAX

WRITE READ

EXTENDED

REGISTER

COMMAND

(NOTE 3)

READ

EXTENDED

STATUS

REGISTER DATA

A = RA

READ

COMPATIBLE

STATUS

REGISTER DATA

A = RA

CEX (E) VIH

(NOTE 4) VIL

OE (G)

VIH

VIL

WE (W) VIH

VIL

tWHEH

tELWL

tWHWL

tWLWH

tWHDX

tWHGL

tWHQV 1, 2

tGHWL

DATA (D/Q) VIH

VIL

HIGH-Z

tPHWL

tDVWH

DIN

DIN

tWHRL

RY/BY

(R)

VOH

VOL

DIN

DOUT

DIN

tRHPL

RP (P)

VIH

VIL

tVPWH

(NOTE 5)

tQVVL

VPP

(V)

VPPH

VPPL

NOTES:

1. This address string depicts Data-Write/Erase cycles with corresponding verification via ESRD.

2. This address string depicts Data-Write/Erase cycles with corresponding verification via CSRD.

3. This cycle is invalid when using CSRD for verification during Data-Write/Erase operations.

4. CEX is defined as the latter of CE0 or CE1 going LOW or the first of CE0 or CE1 going HIGH.

5. RP low transition is only to show tRHPL; not valid for above Read and Write cycles.

Figure 15. AC Waveforms for Command Write Operations

28F016SUT-13

30

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