MT9094AP 查看數據表（PDF） - Zarlink Semiconductor Inc

零件编号

产品描述 (功能)

生产厂家

MT9094AP

ISO2-CMOS ST-BUS™ FAMILY Digital Telephone (DPhone-II)

Zarlink Semiconductor Inc 

MT9094

Data Sheet

Pin Description (continued)

Pin # Name

Description

13 SCLK Serial Port Synchronous Clock (Input). Data clock for MCS-51 compatible microport. TTL level

compatible.

14 DATA 2 Serial Data Transmit. In an alternate mode of operation, this pin is used for data transmit from MT9094.

In the default mode, serial data transmit and receive are performed on the DATA 1 pin and DATA 2 is tri-

stated.

15 DATA 1 Bidirectional Serial Data. Port for microprocessor serial data transfer compatible with MCS-51 standard

(default mode). In an alternate mode of operation, this pin becomes the data receive pin only and data

transmit is performed on the DATA 2 pin. Input level TTL compatible.

16 CS Chip Select (Input). This input signal is used to select the device for microport data transfers. Active

low. (TTL level compatible.)

17 WD Watchdog (Output). Watchdog timer output. Active high.

18

IC Internal Connection. Tie externally to VSS for normal operation.

19, NC No Connection. No internal connection to these pins.

20

21

22-33

VSSD

S1-S12

Digital Ground. Nominally 0 volts.

Segment Drivers (Output). 12 independently controlled, two level, LCD segment drivers. An in-phase

signal, with respect to the BP pin, produces a non-energized LCD segment. An out-of-phase signal, with

respect to the BP pin, energizes its respective LCD segment.

34 BP Backplane Drive (Output). A two-level output voltage for biasing an LCD backplane.

35 VDD Positive Power Supply (Input). Nominally 5 volts.

36 HSPKR- Inverting Handset Speaker (Output). Output to the handset speaker (balanced).

37 HSPKR+ Non-Inverting Handset Speaker (Output). Output to the handset speaker (balanced).

38 SPKR- Inverting Speaker (Output). Output to the speakerphone speaker (balanced).

39 SPKR+ Non-Inverting Speaker (Output). Output to the speakerphone speaker (balanced).

40 VSS Power Supply Rail for Analog Output Drivers. Nominally 0 Volts.

SPKR

41 MIC- Inverting Handsfree Microphone (Input). Handsfree microphone amplifier inverting input pin.

42 MIC+ Non-inverting Handsfree Microphone (Input). Handsfree microphone amplifier non-inverting input

pin.

43 VSSA Analog Ground. Nominally 0 V.

44 M- Inverting Microphone (Input). Inverting input to microphone amplifier from the handset microphone.

NOTES:

Intel and MCS-51 are registered trademarks of Intel Corporation, Santa Clara, CA, USA.

Overview

The Functional Block Diagram of Figure 1 depicts the main operations performed within the DPhone-II. Each of

these functional blocks will be described in the sections to follow. This overview will describe some of the end-user

features which may be implemented as a direct result of the level of integration found within the DPhone-II.

3

Zarlink Semiconductor Inc.

Share Link: