NCP565(2004) 查看數據表（PDF） - ON Semiconductor

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NCP565
(Rev.:2004)

1.5 A Low Dropout Linear Regulator

ON Semiconductor 

NCP565

PCB Layout Considerations

Good PCB layout plays an important role in achieving

good load transient performance. Because it is very sensitive

to its PCB layout, particular care has to be taken when

tackling Printed Circuit Board (PCB) layout. The figures

below give an example of a layout where parasitic elements

are minimized. For microprocessor applications it is

customary to use an output capacitor network consisting of

several capacitors in parallel. This reduces the overall ESR

and reduces the instantaneous output voltage drop under

transient load conditions. The output capacitor network

should be as close as possible to the load for the best results.

The schematic of NCP565 typical application circuit, which

this PCB layout is base on, is shown in Figure 16. The output

voltage is set to 3.3 V for this demonstration board according

to the feedback resistors in the Table 1.

Vin

GND

C1

150 m

C2

150 m

2

Vin

Vout 4

NCP565

1

NC

Adj 5

GND

3

C4

10 m

R2

15.8 k

R1

42.2 k

Vout

C3

150 m

C3

150 m

GND

C6

5.6 p

Figure 16. Schematic of NCP565 Typical Application Circuit

Figure 17. Top Layer

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