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ML4658 查看數據表(PDF) - Micro Linear Corporation

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产品描述 (功能)
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ML4658
Micro-Linear
Micro Linear Corporation Micro-Linear
ML4658 Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ML4658
PIN CONFIGURATION
ML4658
24-Pin DIP
CLSN 1
COL+ 2
COL– 3
SQEN/LTD/JABD 4
Rx+ 5
Rx– 6
VCC 7
Tx+ 8
Tx– 9
RTSET 10
RRSET 11
POLRD 12
24 JAB
23 BIAS
22 RxTP+
21 RxTP–
20 LTF
19 TxCAP0
18 TxCAP1
17 GND
16 TxTP+
15 TxTP–
14 RCV
13 XMT
TOP VIEW
ML4658
28-Pin PCC
NC
Rx+
Rx–
VCC
VCC
Tx+
Tx–
4 3 2 1 28 27 26
5
25
6
24
7
23
8
22
9
21
10
20
11
19
12 13 14 15 16 17 18
RxTP–
LTF
NC
TxCAP0
TxCAP1
GND
GND
TOP VIEW
PIN DESCRIPTION (DIP)
PIN# NAME
1 CLSN
FUNCTION
Indicates that a collision is taking place. Active low LED driver, open collector. Event is extended
100ms for visibility.
2 COL+
3 COL–
Gated 10MHz signal used to indicate a collision, SQE test, or jabber. Balanced differential
line driver outputs that meet AU interface specifications. AC or DC coupled.
4 SQEN/LTD/ SQE Test Enable, Link Test Disabled, Jabber Disabled. This input uses four voltage levels to
JABD
configure the chip as shown in Table 1.
Table 1. SQEN/LTD/JABD Pin Configuration
5 Rx+
6 Rx–
7 VCC
8 Tx+
9 Tx–
10 RTSET
11 RRSET
Pin
SQE Test
Link Test
Jabber
0V (GND)
Disabled
Enabled
Enabled
1.2V
Disabled
Disabled
Disabled
BIAS
Enabled
Disabled
Enabled
5V (VCC)
Enabled
Enabled
Enabled
When link test is disabled, no link pulses are transmitted, and the transmitter and receiver will not be
disabled as a result of a loss of receive link pulses. When Jabber is disabled the transmitter can
transmit continuously without interruption, and the collision oscillator will not be activated.
Manchester encoded receive data output to the local device. Balanced differential line driver outputs
that meet AU interface specifications. AC or DC coupled.
5 Volt power input.
Balanced differential line receiver inputs that meet AU interface specifications. These inputs may be
AC or DC coupled. When AC coupled, the BIAS pin is used to set the common mode voltage. Signals
meeting the transmitter squelch input requirements are pre-equalized and output on TxTP+ and TxTP–.
When using 100unshielded twisted pair, a 220resistor is tied between this pin and VCC. When
using 150shielded twisted pair, a 330resistor is tied between this pin and VCC.
A 1% 61.9Kresistor tied from this pin to VCC is used for internal biasing.
2

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