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SI7013-A20-YM1R 查看數據表(PDF) - Silicon Laboratories

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SI7013-A20-YM1R
Silabs
Silicon Laboratories Silabs
SI7013-A20-YM1R Datasheet PDF : 45 Pages
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Si7013-A20
Table 6. Voltage Converter Specifications
1.9 VDD 3.6 V; TA = –40 to +85 °C (G grade) or –40 to +125 °C (I/Y grade); normal mode conversion time, VREF = 1.25 V
internal or VDDA, buffered and unbuffered mode, unless otherwise noted.
Parameter
Symbol
Test Condition
Min
s Resolution
ign Integral Non-linearity
INL
|VINP-VINN| < VREF/2
Differential Non-linearity
DNL
|VINP-VINN| < VREF/2
es Noise
N
|VINP-VINN| < VREF/2,
VREF = 1.25 V, Normal Mode
D |VINP-VINN| < VREF/2,
VREF = 1.25 V, Fast Mode
w Input Offset
(Buffered Mode)
VOS
|VINP-VINN| = 0
e Input Offset
VOS
(Unbuffered Mode)1,2
|VINP-VINN| = 0
N Gain Accuracy
G
VREF = 1.25 V; gain is absolute
r VREF = VDD; gain is relative to VDD
fo Notes:
1. Guaranteed by design.
Not Recommended 2. In unbuffered mode, RIN*CIN should be < 0.5usec. CIN minimum is around 10 pF.
Typ
VREF/
32768
1
1
25
Max
50
10
1
+1
+2
+0.25 +0.5
Unit
V
LSB
LSB
μVRMS
mV
mV
%
%
10
Rev. 1.4

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