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74AHC08D-Q100 查看數據表(PDF) - NXP Semiconductors.

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74AHC08D-Q100
NXP
NXP Semiconductors. NXP
74AHC08D-Q100 Datasheet PDF : 14 Pages
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Nexperia
74AHC08-Q100; 74AHCT08-Q100
Quad 2-input AND gate
Table 7. Dynamic characteristics …continued
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min
Max
Min
Max
For type 74AHCT08-Q100
tpd
propagation nA, nB to nY; see Figure 6 [2]
delay
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 3.2 6.9 1.0
8.0
1.0
9.0 ns
CL = 50 pF
- 4.2 7.9 1.0
9.0
1.0
10.0 ns
CPD
power
CL = 50 pF; fi = 1 MHz;
[3] - 12.0 -
-
-
-
-
pF
dissipation VI = GND to VCC
capacitance
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CL VCC2 fo) = sum of the outputs.
11. Waveforms
VI
nA, nB input
GND
VOH
nY output
VOL
VM
t PHL
VM
t PLH
mna224
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The input (nA, nB) to output (nY) propagation delays
Table 8. Measurement points
Type
74AHC08-Q100
74AHCT08-Q100
Input
VM
0.5VCC
1.5 V
Output
VM
0.5VCC
0.5VCC
74AHC_AHCT08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 April 2013
© Nexperia B.V. 2017. All rights reserved
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