AD622(RevC) 查看數據表（PDF） - Analog Devices
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AD622 Datasheet PDF : 11 Pages
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AD622
Table I. Make vs. Buy Error Budget
Error Source
AD622 Circuit
Calculation
“Homebrew” Circuit
Calculation
Total Error
in ppm
Relative to 1 V FS
AD622
Total Error
in ppm
Relative to 1 V FS
Homebrew
ABSOLUTE ACCURACY at TA = +25°C
Total RTI Offset Voltage, µV
Input Offset Current, nA
CMR, dB
250 µV + 1500 µV/10
2.5 nA × 1 kΩ
86 dB→50 ppm × 0.5 V
800 µV × 2
15 nA × 1 kΩ
(0.1% Match × 0.5 V)/10 V
400
1600
2.5
15
25
50
DRIFT TO +85°C
Gain Drift, ppm/°C
Total RTI Offset Voltage, µV/°C
Input Offset Current, pA/°C
Total Absolute Error
(50 ppm + 5 ppm) × 60°C
(50 ppm)/°C × 60°C
(2 µV/°C + 15 µV/°C/10) × 60°C 9 µV/°C × 2 × 60°C
2 pA/°C × 1 kΩ × 60°C
155 pA/°C × 1 kΩ × 60°C
427.5
3300
210
0.12
1665
3000
1080
9.3
RESOLUTION
Gain Nonlinearity, ppm of Full Scale
10 ppm
Typ 0.1 Hz–10 Hz Voltage Noise, µV p-p 0.6 µV p-p
Total Drift Error
20 ppm
0.55 µV p-p × √2
3510.12
10
0.6
4089.3
20
0.778
Total Resolution Error
10.6
20.778
Grand Total Error
3948
5575
GAIN SELECTION
The AD622’s gain is resistor programmed by RG, or more pre-
cisely, by whatever impedance appears between Pins 1 and 8.
The AD622 is designed to offer gains as close as possible to
popular integer values using standard 1% resistors. Table II
shows required values of RG for various gains. Note that for
G = 1, the RG pins are unconnected (RG = ∞). For any arbitrary
gain RG can be calculated by using the formula
RG
=
50.5 kΩ
G −1
To minimize gain error avoid high parasitic resistance in series
with RG, and to minimize gain drift, RG should have a low
TC—less than 10 ppm/°C for the best performance.
Table II. Required Values of Gain Resistors
Desired
Gain
2
5
10
20
33
40
50
65
100
200
500
1000
1% Std Table
Value of RG, ⍀
51.1 k
12.7 k
5.62 k
2.67 k
1.58 k
1.3 k
1.02 k
787
511
255
102
51.1
Calculated
Gain
1.988
4.976
9.986
19.91
32.96
39.85
50.50
65.17
99.83
199.0
496.1
989.3
–8–
REV. C
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