171050601 查看數據表（PDF） - Wurth Elektronik GmbH & Co. KG, Germany.
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171050601
Wurth Elektronik GmbH & Co. KG, Germany.
171050601 Datasheet PDF : 56 Pages
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WPMDM1500602 / 171050601
MagI3C Power Module
VDRM – Variable Step Down Regulator Module
Step 4 Select the soft-start capacitor (CSS)
Adujstable soft-start permits the regulator to slowly ramp to its steady state operating point after being enabled, thereby
reducing current inrush from the input supply and slowing the output voltage rise time to prevent overshoot.
Upon turn-on, after all UVLO conditions have been passed, an internal 1.6ms circuit slowly ramps the SS/TRK input to
implement internal soft start. If the preset soft-start time is enough for the application, the SS/TRK can be left floating.
Longer soft-start periods are achieved by adding an external capacitor to this pin.
Soft-start duration is given by the formula:
CSS=
tSS∙
ISS
VFB
(13)
where tSS corresponds to the soft-start time in milliseconds, ISS (50µA) is the current flowing out of the SS/TRK during start-
up and VFB = 0.796.
Using a 220nF capacitor results in 3.5ms typical soft-start duration; and 470nF results in 7.5ms typical. 470nF is a
recommended initial value. As the soft-start input exceeds 0.796V the output of the power stage will be in regulation and the
50μA current is deactivated. Note that the following conditions will reset the soft-start capacitor by discharging the SS input
to ground with an internal current sink.
The enable input being “pulled low”
Thermal shutdown condition
Internal VCC UVLO (Approx 4.3V input to VIN)
The output voltage rising waveforms with different soft-start capacitors are shown in the diagram below.
Output Voltage at start up with different soft-start capacitor at VOUT= 3.3V, VIN = 12V
5,0
tSS
4,0
3,0
Enable
2,0
1,0
0,0
0
2
4
6
8
Time [ms]
no Css
Css = 220nF
Css = 470nF
10
12
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© July 2018
Würth Elektronik eiSos GmbH & Co. KG – Data Sheet Rev. 2.0
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