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171050601 查看數據表(PDF) - Wurth Elektronik GmbH & Co. KG, Germany.

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产品描述 (功能)
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171050601
WURTH
Wurth Elektronik GmbH & Co. KG, Germany. WURTH
171050601 Datasheet PDF : 56 Pages
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WPMDM1500602 / 171050601
MagI3C Power Module
VDRM Variable Step Down Regulator Module
Step 7 Optional: Synchronization to an external clock
The PWM switching frequency can be synchronized to an external frequency source through the SYNC pin (see picture
below). This feature helps avoiding undesired beat frequencies due to slight deviations of the default switching frequency in
case more modules are present in the same system. In addition, when phase shift is implemented by using two clocks
(CLK1 and CLK2), the input RMS current, and consequently input voltage ripple and input capacitance, can be reduced.
The recommended synchronization frequency range is 650kHz to 950 kHz. The typical input threshold is 1.4V transition
level. Ideally, the input clock should overdrive the threshold by a factor of 2, such as direct drive from 3.3V logic source. The
duty cycle of the synchronization signal should be in the range of 15% and 85%, as indicated in the “Electrical
Specifications” on page 5. The module is synchronized by the falling edge of the synchronization signal after a small delay
(see figure below). If this feature is not used, connect this input either directly to ground, or connect to ground through a
resistor (RSYNC, see “Typical schematic” section on page 39) of 1.5kΩ or less.
VCLK
3.3V
Trigger on the
falling edge
Synchronization signal
VSW
t
dela y
Start of the new
ON cycle
Switch node voltage
t
Note that applying a sustained “logic 1” corresponds to 0Hz PWM frequency and will cause the module to stop switching.
The figure below shows how two (in this case) or more power modules can be synchronized by a clock generator.
VIN
GND
1
VIN
7
VOUT
Modu le
2 SYNC
PGND
EP
AGND 4
VOUT1
1
VIN
7
VOUT
Modu le
2 SYNC
PGND
EP
AGND 4
VOUT2
GND
CLK1
Clock generator
CLK2
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© July 2018
Würth Elektronik eiSos GmbH & Co. KG Data Sheet Rev. 2.0
30/56

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