HEF4521B(2009) 查看數據表（PDF） - NXP Semiconductors.

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HEF4521B
(Rev.:2009)

24-stage frequency divider and oscillator

NXP Semiconductors. 

NXP Semiconductors

HEF4521B

24-stage frequency divider and oscillator

Table 9. Dynamic power dissipation PD

PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.

Symbol Parameter

VDD

Typical formula for PD (µW)

where:

PD

dynamic power 5 V

PD = 1200 × fi + Σ(fo × CL) × VDD2

fi = input frequency in MHz,

dissipation

10 V

PD = 5100 × fi + Σ(fo × CL) × VDD2

fo = output frequency in MHz,

15 V

PD = 13050 × fi + Σ(fo × CL) × VDD2

CL = output load capacitance in pF,

VDD = supply voltage in V,

Σ(CL × fo) = sum of the outputs.

13. Waveforms

VI

MR input

0V

VI

A2 input

0V

VOH

Qn output

VOL

VM

tW

1/fmax

VM

trec

tW

tPHL

90 %

10 %

tt

tPLH

tt

001aae712

a. Pulse widths, maximum frequency, recovery and transition times and A2 to Qn propagation delays

VI

VOH

A1 input

VM

Qn output

VM

0V

VOH

tPLH

tPHL

VOL

VOH

tPLH

tPHL

Y1 output

VM

Qn + 1 output

VM

VOL

Y1 propagation delays

VOL

Qn to Qn + 1 propagation delays

001aak015

b. A1 to Y1, MR to Qn and Qn to Qn + 1 propagation delays

Fig 5.

Measurement points are given in Table 10.

The logic levels VOH and VOL are typical output voltage levels that occur with the output load.

Waveforms showing measurement of dynamic characteristics

HEF4521B_5

Product data sheet

Rev. 05 — 5 November 2009

© NXP B.V. 2009. All rights reserved.

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