PCA9534D 查看數據表（PDF） - NXP Semiconductors.
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PCA9534D Datasheet PDF : 27 Pages
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NXP Semiconductors
PCA9534
8-bit I2C-bus and SMBus low power I/O port with interrupt
Table 3.
Symbol
IO6
IO7
INT
SCL
SDA
VDD
Pin description …continued
Pin
Description
SO16, TSSOP16 HVQFN16
11
9
input/output 6
12
10
input/output 7
13
11
interrupt output (open-drain)
14
12
serial clock line
15
13
serial data line
16
14
supply voltage
[1] HVQFN package die supply ground is connected to both VSS pin and exposed center pad. VSS pin must be
connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level
performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the
board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in
the thermal pad region.
6. Functional description
Refer to Figure 1 “Block diagram of PCA9534”.
6.1 Registers
6.1.1 Command byte
Table 4. Command byte
Command Protocol
0
read byte
1
read/write byte
2
read/write byte
3
read/write byte
Function
Input Port register
Output Port register
Polarity Inversion register
Configuration register
The command byte is the first byte to follow the address byte during a write transmission.
It is used as a pointer to determine which of the following registers will be written or read.
6.1.2 Register 0 - Input Port register
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless
of whether the pin is defined as an input or an output by Register 3. Writes to this register
have no effect.
The default ‘X’ is determined by the externally applied logic level.
PCA9534
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 7 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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