AT32UC3A0512-CTUR(2009) 查看數據表（PDF） - Atmel Corporation

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AT32UC3A0512-CTUR
(Rev.:2009)

AVR®32 32-Bit Microcontroller

Atmel Corporation 

AT32UC3A

4. Blockdiagram

Figure 4-1. Blockdiagram

VBUS

D+

D-

TCK

TDO

TDI

TMS

JTAG

INTERFACE

MCKO

MDO[5..0]

M S E O [1 ..0 ]

EVTI_N

EVTO_N

ID

VBOF

COL,

CRS,

R X D [3 ..0 ],

RX_CLK,

RX_DV,

RX_ER

MDC,

TXD[3..0],

TX_CLK,

TX_EN,

TX_ER,

SPEED

MDIO

USB

INTERFACE

DMA

DMA

ETHERNET

MAC

PA

PB

PC

E X T IN T[7 ..0 ]

PX

KPS[7..0]

NMI_N

NEXUS

CLASS 2+

OCD

UC CPU

MEMORY PROTECTION UNIT

INSTR

DATA

INTERFACE INTERFACE

LOCAL BUS

INTERFACE

FAST GPIO

64 KB

SRAM

S

M

M

M

M

M

S

S

HIGH SPEED

BUS MATRIX

S

S

S

M

C O N FIG U R A T IO N

REGISTERS BUS

PB

HS

H SBB-PB

BRIDGE B

HSB

HSB-PB

BRIDGE A

PB

PERIPHERAL

DMA

CONTROLLER

INTERRUPT

CONTROLLER

EXTERNAL

INTERRUPT

CONTROLLER

REAL TIME

COUNTER

WATCHDOG

TIM E R

USART1

USART0

USART2

USART3

SERIAL

PERIPHERAL

INTERFACE 0/1

512 KB

FLASH

D A T A [1 5 ..0 ]

ADDR[23..0]

NCS[3..0]

NRD

N W A IT

NWE0

NWE1

NWE3

RAS

CAS

SDA10

SDCK

SDCKE

SDCS0

SDWE

RXD

TXD

CLK

RTS, CTS

DSR, DTR, DCD, RI

RXD

TXD

CLK

RTS, CTS

SCK

MISO, MOSI

NPCS0

NPCS[3..1]

RESET_N

115 kHz

RCOSC

XIN32 32 KHz

XOUT32

OSC

XIN0

XOUT0

OSC0

XIN1

XOUT1

OSC1

PLL0

PLL1

G C L K [3 ..0 ]

A[2..0]

B[2..0]

CLK[2..0]

POWER

MANAGER

CLOCK

GENERATOR

CLOCK

CONTROLLER

SLEEP

CONTROLLER

RESET

CONTROLLER

T IM E R /C O U N T E R

SYNCHRONOUS

SERIAL

CONTROLLER

TW O -W IR E

INTERFACE

TX_CLOCK, TX_FRAME_SYNC

TX_DATA

RX_CLOCK, RX_FRAME_SYNC

RX_DATA

SCL

SDA

PULSE WIDTH

M O D U L A T IO N

CONTROLLER

ANALOG TO

D IG IT A L

CONVERTER

AUDIO

BITSTREAM

DAC

PW M[6..0]

AD[7..0]

DATA[1..0]

DATAN[1..0]

PA

PB

PC

PX

ADVREF

5

32058H–AVR32–03/09

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