LPC2388FBD144(2008) 查看數據表（PDF） - NXP Semiconductors.

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LPC2388FBD144
(Rev.:2008)

Single-chip 16-bit/32-bit micro; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC

NXP Semiconductors. 

NXP Semiconductors

6. Pinning information

6.1 Pinning

LPC2388

Single-chip 16-bit/32-bit microcontroller

1

108

LPC2388FBD144

36

73

Fig 2. LPC2388 pinning

002aad333

6.2 Pin description

Table 3. Pin description

Symbol

Pin

P0[0] to P0[31]

P0[0]/RD1/TXD/

SDA1

66[1]

P0[1]/TD1/RXD3/ 67[1]

SCL1

P0[2]/TXD0

P0[3]/RXD0

P0[4]/

I2SRX_CLK/

RD2/CAP2[0]

141[1]

142[1]

116[1]

Type

I/O

I/O

I

O

I/O

I/O

O

I

I/O

I/O

O

I/O

I

I/O

I/O

I

I

Description

Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The

operation of port 0 pins depends upon the pin function selected via the Pin Connect

block.

P0[0] — General purpose digital input/output pin.

RD1 — CAN1 receiver input.

TXD3 — Transmitter output for UART3.

SDA1 — I2C1 data input/output (this is not an open-drain pin).

P0[1] — General purpose digital input/output pin.

TD1 — CAN1 transmitter output.

RXD3 — Receiver input for UART3.

SCL1 — I2C1 clock input/output (this is not an open-drain pin).

P0[2] — General purpose digital input/output pin.

TXD0 — Transmitter output for UART0.

P0[3] — General purpose digital input/output pin.

RXD0 — Receiver input for UART0.

P0[4] — General purpose digital input/output pin.

I2SRX_CLK — Receive Clock. It is driven by the master and received by the slave.

Corresponds to the signal SCK in the I2S-bus specification.

RD2 — CAN2 receiver input.

CAP2[0] — Capture input for Timer 2, channel 0.

LPC2388_1

Product data sheet

Rev. 01 — 19 December 2008

© NXP B.V. 2008. All rights reserved.

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