Philips Semiconductors
Very low dropout voltage/quiescent current
3.3 V voltage regulator with enable
Preliminary specification
TDA3673
CHARACTERISTICS
VP = 14.4 V; Tamb = 25 °C; measured in test circuit of Fig.3; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supply voltage: pin VP
VP
supply voltage
TDA3673T
TDA3673AT
Iq
quiescent current
Enable input: pin EN
regulator operating; note 1
3
3
VP = 14.4 V; IREG = 0 mA;
−
VI(EN) = 0 V
VP = 14.4 V; IREG = 0 mA;
−
VI(EN) = 5 V
6 V ≤ VP ≤ 22 V; IREG = 10 mA
−
6 V ≤ VP ≤ 22 V; IREG = 50 mA
−
14.4 33 V
14.4 45 V
4
15 µA
15 30 µA
0.2 0.5 mA
1.4 2.5 mA
VI(EN)
enable input voltage
II(EN)
enable input current
Regulator output: pin REG; note 2
enable off; VREG ≤ 0.8 V
enable on; VREG ≥ 3 V
VI(EN) = 5 V
−1 −
+1.0 V
3.0 −
18 V
−
0.3 −
µA
VREG
output voltage
VREG(drop) dropout voltage
VREG(stab)
∆VREG(line)
long-term output voltage
stability
line input regulation voltage
∆VREG(load) load output regulation voltage
SVRR
supply voltage ripple rejection
IREG(crl)
ILO(rp)
current limit
output leakage current at
reverse polarity input
8 V ≤ VP ≤ 22 V; IREG = 0.5 mA
0.5 mA ≤ IREG ≤ 100 mA
6 V ≤ VP ≤ 45 V; IREG = 0.5 mA
VP = 3.1 V; Tamb ≤ 85 °C;
IREG = 50 mA
7 V ≤ VP ≤ 22 V; IREG = 0.5 mA
7 V ≤ VP ≤ 45 V; IREG = 0.5 mA
0.5 mA ≤ IREG ≤ 50 mA
fi = 120 Hz; Vi(ripple) = 1 V (RMS);
IREG = 0.5 mA
VREG > 2.8 V
VP = −15 V; VREG ≤ 0.3 V
3.16
3.13
3.13
−
−
−
−
−
50
0.17
−
3.3
3.3
3.3
0.18
20
1
1
10
60
0.25
1
3.44
3.47
3.47
0.3
−
30
50
50
−
−
500
V
V
V
V
mV/1000 h
mV
mV
mV
dB
A
µA
Notes
1. The regulator output will follow VP if VP < VREG + VREG(drop).
2. Limiting values as applicable for device type:
a) TDA3673T: VP ≤ 33 V and −40 °C ≤ Tamb ≤ +85 °C.
b) TDA3673AT: VP ≤ 45 V and −40 °C ≤ Tamb ≤ +125 °C.
2000 Feb 01
5