VSC6108 查看數據表（PDF） - Vitesse Semiconductor
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VSC6108 Datasheet PDF : 10 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC6108/10/12
Low Jitter
Clock Multiplier and Distributor
AC Timing Characteristics
The VSC6108/6110/6112 has an output time jitter of less than 25 ps peak-to-peak. To achieve this jitter
specification the input reference clock must have less than 10 ps peak-to-peak. Output skew is less than 50 ps
between any two outputs.
Table 3: AC Timing Specifications
Parameter
Description
RCd
Reference clock duty cycle
RCj
Reference clock jitter
OCd
Output clock duty cycle
OCj
Output clock OCLK0-17 jitter
Tsk
Skew between any output clock to any other clock
Lr
Reference Clock RCK/RCKN frequency range
Lt
Lock time
trf
Output rise/fall time 20-80%
Min
40
40
-50
-1.0
Typ
100
Max
60
10
60
25
+50
+1.0
10
150
Units
%
pSPP
%
pSPP
ps
%
µS
ps
DC Characteristics
The VSC6108/6110/6112 can be operated from a single 3.3-Volt power supply. Using a -3.3-Volt supply,
the inputs and outputs are ECL-compatible. Using a +3.3-Volt power supply, the inputs and outputs are PECL-
compatible. Total power dissipation is less than 2 Watts.
Table 4: Single Ended ECL Inputs
Parameter
Description
Min
Typ
Max
VIH
Input HIGH voltage
VIL
Input LOW voltage
-1020
-2000
-
-700
-
-1620
Note: VEE = -3.3V ± 5%, VCC = GND, Load = 50 to -2.0V, VREF = -1.32V ± 25 mV.
Table 5: Differential ECL Inputs and Outputs
Parameter
Description
Min
Typ
Max
VIN,DIFF
Input Voltage Differential
200
-
-
VIN,CM
Input Common Mode
Voltage
-1.5
-
-0.5
VOUT,DIFF
Output Voltage Differential
400
VOUT,CM
Output Common Mode
Voltage
-1.6
-
800
-
-1.2
Units
mV
mV
Units
mV
V
mV
V
Conditions
Conditions
Required input
voltage swing
Required input
common mode
voltage
Output voltage
swing
Common mode
output voltage
G52224-0, Rev 2.1
2/15/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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