PD69108F 查看數據表（PDF） - Microsemi Corporation
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PD69108F Datasheet PDF : 17 Pages
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TM
PIN
7
8
9
PIN NAME
AGND
N/C
PORT_SENSE2
10 VPORT_NEG2
PORT_SENSE3
11
12 VPORT_NEG3
13 N/C
14 N/C
VMAIN
15
VAUX5
16
DRV_VAUX5
17
18 AGND
19 VAUX3P3_INT
VAUX3P3
20
21 QGND
22 IREF
23 TRIM
REG_EN_N
24
25 VPORT_NEG4
PORT_SENSE4
26
27 VPORT_NEG5
PORT_SENSE5
28
29 N/C
30 AGND
31 VPORT_NEG6
PD69108/F
®
8 PORTS PSE POE MANAGER
DATASHEET
PIN TYPE
Power
Analog Input
Analog I/O
Analog Input
Analog I/O
Analog I/O
Analog I/O
Power
Power
Power
Power
Power
Power
Power
Analog Input
Analog Input
REG_EN_N
Analog I/O
Analog Input
Analog I/O
Analog Input
Power
Analog I/O
DESCRIPTION
Analog ground
Not Connected
Sense resistor port input
(Connected to 0.36 Ω, 1% resistor to QGND with ~12 mΩ trace for
measurements accuracy).
Negative port output
Sense resistor port input
(Connected to 0.36 Ω, 1% resistor to QGND with ~12 mΩ trace for
measurements accuracy).
Negative port output
Test pin for production use only
Keep open, not connected
Supplies voltage for the internal analog circuitry. A low ESR 1 uF (or
higher) bypass capacitor, connected to AGND should be placed as
close as possible to this pin through low resistance traces.
Regulated 5 VDC output voltage source; it needs to be connected to
a filtering capacitor of 4.7 uF or higher.
If an external NPN is used to regulate the voltage, connect this pin to
the "Emitter" (the "collector" should be connected to Vmain)
Driven outputs for 5 VDC external regulation; if internal regulation is
used, connect to pin 16.
If an external NPN is used to regulate the voltage, connect this pin to
the "Base".
Analog ground
Connected to VAX3P3 (pin 20) if internal 3.3 VDC regulator is used.
Connect to VAUX5 (pin 16) if external 3.3 VDC regulator is used
Regulated 3.3v output voltage source. A 4.7 μF or higher filtering
capacitor should be connected between this pin and AGND.
When an external 3.3 VDC regulator is used, connect it to this pin to
supply the chip.
Quiet analog ground.
Reference resistor pin. Connect a 30.1 kΩ 1% resistor to QGND.
Trimming Input for IC production.
Should be connected to VAUX3P3.
Enable/Disable the internal 3.3 VDC regulator in case an external
3.3 VDC is used to supply the chip.
• GND: Internal regulator enabled
• 3.3 VDC: Internal regulator disabled
Negative port output.
Sense resistor port input
(Connected to 0.36 Ω, 1% resistor to QGND with ~12 mΩ trace for
measurements accuracy).
Negative port output.
Sense resistor port input.
(Connected to 0.36 Ω, 1% resistor to QGND with ~12 mΩ trace for
measurements accuracy).
Not Connected
Analog ground.
Negative port output.
Copyright © 2013
Microsemi
8
Rev. 1.6
Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
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