NJU72010
1.1.2 Flying capacitor (C4)
Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide
low impedance for the wiring between CP terminal (4pin), CN terminal (5pin), and the flying capacitor
(C4).
C4=1uF
CP(4pin)
CN(5pin)
Fig.2 The NJU72040 block diagram (4pin, 5pin)
1.1.3 Hold capacitor (C6)
Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide
low impedance for the wiring between the hold capacitor (C6), V- terminal (6pin) and the GND on the
PCB.
Separate the GND pattern connecting to the hold capacitor (C6) from that connecting to the GND
terminal (8pin), thus suppressing the influence of switching noise by removing the common impedance
of the GND wiring.
Design no short-circuits of V- terminal (6pin) and V+ terminal (3pin) on the PCB pattern.
V-(6pin)
C6
GND(8pin)
Fig.3 The NJU72010 block diagram (6pin, 8pin)
1.1.4 Mute terminal pop noise countermeasures (R2, C7)
Mute terminal needs time constant more than R2 x C7=0.1. It is necessary to adjust 22kΩ or less.
– 10 –
MUTE(7pin)
400kΩ
R2=22kΩ
Vcnt
C7=4.7uF
Fig.4 The NJU72010 block diagram (7pin)