ML4425 查看數據表（PDF） - Micro Linear Corporation
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ML4425 Datasheet PDF : 16 Pages
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ML4425
PIN DESCRIPTION (Pin number in parenthesis is for TQFP package)
PIN NAME
FUNCTION
PIN NAME
1(30) ISENSE
2(31) HA
3(32) HB
Motor current sense input. When
ISENSE exceeds 0.2 ´ ILIMIT, the
output drivers LA, LB, and LC are
shut off for a fixed time
determined by CIOS
Active low output driver for the
phase A high-side switch
Active low output driver for the
phase B high-side switch
4(1) HC
Active low output driver for the
phase C high-side switch
5(3) SPEED COMP Speed control loop compensation is
set by a series resistor and capacitor
from SPEED COMP to GND
6(4) CT
A capacitor from CT to GND sets
the PWM oscillator frequency
7(5) VREF
6.9V reference voltage output
8(6) SPEED SET Speed loop input which ranges
from 0 (stopped) to VREF
(maximum speed)
17(17) CAT
18(18) UV FAULT
19(19) CRT
20(20) SPEED FB
21(21) CRR
22(22) FB A
9(7) LA
10(8) LB
Active high output driver for the
phase A low-side switch
Active high output driver for the
phase B low-side switch
23(23) FB B
11(9) LC
Active high output driver for the
phase C low-side switch
12(10) ILIMIT
Voltage on this pin sets the ISENSE
threshold voltage at 0.2 ´ ILIMIT,
leaving this pin unconnected
selects an internally set threshold
13(11) VCO/TACH
This TTL level output corresponds
to the signal used to clock the
commutation state machine. The
output frequency is proportional to
the motor speed when the back-
EMF sensing loop is locked onto
the rotor position
24(24) FB C
25(25) BRAKE
26(26) CIOS
14(12) VDD
15(15) CVCO
12V power supply input
A capacitor to GND sets the
voltage-to-frequency ratio of the
VCO
27(27) RREF
16(16) RVCO
An resistor to GND sets up a
current proportional to the input
voltage of the VCO
28(28) GND
FUNCTION
A capacitor to GND sets the time
that the controller stays in the
align mode
This output goes low when VDD
drops below the UVLO threshold,
and indicates that all output
drivers have been disabled
A capacitor to GND sets the time
that the controller stays in the
ramp mode
Output of the back-EMF sampling
circuit and input to the VCO. An
RC network connected to SPEED
FB sets the compensation for the
PLL loop formed by the back-EMF
sampling circuit, the VCO, and
the commutation state machine
A capacitor to between CRR and
SPEED FB sets the ramp rate
(acceleration) of the motor when
the controller is in ramp mode
The motor feedback voltage from
phase A is monitored through a
resistor divider for back-EMF
sensing at this pin
The motor feedback voltage from
phase B is monitored through a
resistor divider for back-EMF
sensing at this pin
The motor feedback voltage from
phase C is monitored through a
resistor divider for back-EMF
sensing at this pin
A logic low input activates motor
braking by shutting off the high-
side output drivers and turning on
the low-side output drivers
A capacitor to GND sets the time
that the low-side output drivers
remain off after ISENSE exceeds its
threshold
An 137kW resistor to GND sets a
current proportional to VREF that is
used to set all the internal bias
currents except for the VCO
Signal and power ground
3
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