TMP88CS38 查看數據表（PDF） - Toshiba
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TMP88CS38 Datasheet PDF : 226 Pages
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TMP88CS38/CM38A/CP38A
1.2 Program Memory (ROM)
The TMP88CS38 contains a 64-Kbyte program memory (Mask ROM) at addresses from
04000H to 13EFFH and FFF00H to FFFFFH.
The TMP88CM38A contains a 32-Kbyte program memory (Mask ROM) at address from
04000H to 0BEFFH and FFF00H to FFFFFH. The TMP88CP38A contains a 48-Kbyte program
memory (Mask ROM) at address from 04000H to 0FEFFH and FFF00H to FFFFFH.
Addresses FFF00H through FFFFFH in the program memory are also used for a particular
purpose.
1.3 Data Memory (RAM)
The TMP88CS38 has a 2-Kbyte data memory (Static RAM) address from 0040H to 08BFH.
The TMP88CM38A/P38A has a 1.5-Kbyte data memory (Static RAM) (Address from 0040H to
06BFH.
The first 128 bytes (Addresses 00040H through 000BFH) in the built-in RAM are also
available as general-purpose register banks.
The general-purpose registers are mapped in the RAM; therefore, do not clear RAM at the
current bank addresses.
Example: Clears RAM to “00H” except the bank 0 (TMP88CS38/CM38A/CP38A):
LD
HL, 0048H
; Sets start address to HL register pair
LD
A, H
; Sets initial data (00H) to A register
LD
BC, 0877H
; Sets number of byte to BC register pair
SRAMCLR:
LD
(HL+), A
DEC BC
JRS F, SRAMCLR
Note:
The data memory contents become unstable when the power supply is turned on ; therefore,
the data memory should be initialized by an initialization routine. Note that the
general-purpose registers are mapped in the RAM; therefore, do not clear RAM at the
current bank addresses.
1.4 System Clock Controller
The system clock controller consists of a clock generator, a timing generator, and a standby
controller.
XIN
XOUT
Clock
generator
High-frequency
clock oscillator
Timing generator control register
TBTCR
00036H
fc
Timing
generator
Standby controller
System clocks
Clock generator control
00038H
00039H
SYSCR1
SYSCR2
System control registers
Figure 1.4.1 System Clock Controller
88CS38-8
2007-09-12
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