VS1011E 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
VS1011E Datasheet PDF : 49 Pages
| |||
VS1011e
VS1011E
VS1011e - MPEG AUDIO CODEC
Features
• Decodes MPEG 1.0 & 2.0 audio layer III
(CBR, VBR, ABR); layers I & II optional;
WAV (PCM + IMA ADPCM)
• 320 kbit/s MP3 with 12.0 MHz external clock
• Streaming support for MP1/2/3 and WAV
• Bass and treble controls
• Operates with single 12..13 MHz or 24..26
MHz external clock
• Internal clock doubler
• Low-power operation
• High-quality stereo DAC with no phase er-
ror between channels
• Stereo earphone driver capable of driving a
30Ω load
• Separate 2.5 .. 3.6 V operating voltages for
analog and digital
• Serial control and data interfaces
• Can be used as a slave co-processor
• 5.5 KiB On-chip RAM for user code / data
• SPI flash boot for special applications
• New functions may be added with software
and 4 GPIO pins
• Lead-free and RoHS-compliant packages
LPQFP-48, BGA-49, and SOIC-28
Description
VS1011e is a single-chip MPEG audio decoder.
The chip contains a high-performance, low-power
DSP processor core VS DSP4, working memory,
5 KiB instruction RAM and 0.5 KiB data RAM
for user applications, serial control and input data
interfaces, 4 general purpose I/O pins, as well as
a high-quality variable-sample-rate stereo DAC,
followed by an earphone amplifier and a common
buffer.
VS1011e receives its input bitstream through a se-
rial input bus, which it listens to as a system slave.
The input stream is decoded and passed through a
digital volume control to an 18-bit oversampling,
multi-bit, sigma-delta DAC. The decoding is con-
trolled via a serial control bus. In addition to basic
decoding, it is possible to add application specific
features, like DSP effects, to the user RAM mem-
ory.
VS1011
GPIO
GPIO
4
Stereo
DAC
DREQ
SO
SI
SCLK
XCS
XDCS
Serial
Data/
Control
Interface
4
VSDSP
Instruction
RAM
Instruction
ROM
Stereo Ear−
phone Driver
X ROM
audio
L
R
output
X RAM
Y ROM
Y RAM
Version 1.04, 2007-10-08
1
Share Link: 