ADCMP600/ADCMP601/ADCMP602
2.20
2.00
1.80
1.35
6
5
4
2.40
1.25
2.10
1.15
1
2
3
1.80
1.30 BSC
1.00
0.90
0.70
0.65 BSC
1.10
0.40
0.80
0.10
0.10 MAX
0.30
SEATING
0.22
PLANE
0.08
0.46
0.36
COPLANARITY
0.15
0.26
0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 29. 6-Lead Thin Shrink Small Outline Transistor Package (SC70)
(KS-6)
Dimensions shown in millimeters
3.20
3.00
2.80
3.20
3.00
2.80
8
5
5.15
4.90
4.65
1
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
15° MAX
0.85
1.10 MAX
0.75
0.80
0.15
0.05
0.40
COPLANARITY
0.25
6°
0.23
0°
0.09
0.55
0.40
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 30. 8-Lead Mini Small Outline Package (MSOP)
(RM-8)
Dimensions shown in millimeters
Rev. A | Page 15 of 16