UPD720133GB-YEU-A 查看數據表（PDF） - NEC => Renesas Technology

零件编号

产品描述 (功能)

生产厂家

UPD720133GB-YEU-A

USB2.0 to IDE Bridge

NEC => Renesas Technology 

µPD720133

2.5 Power Control

To realize bus-powered or high performance self-powered USB2.0 to IDE Bridge system, the µPD720133 has

two internal system clock mode. One is 7.5 MHz for bus-powered mode and another is 60 MHz for self-powered

mode. The µPD720133 controls the power state by events as follows. The word with under line indicates event.

The Italic word indicates the power state.

Figure 2-3. Power State Control

(a) Bus-powered Mode

Power OFF Power OFF

Vbus ON

Connect

Hardware Reset

Idle Mode

Power = PRESET

Bus Reset Default State

FS CONNECT

Vbus OFF

HS CONNECT

FS Enumeration

HS Enumeration

State

Power = PENUM_FS

Suspend

Set Configuration

Resume

State

Power = PENUM_HS

Resume

Set Configuration

Suspend

Configured Suspend

Suspend

Suspend

Configured

Suspend

State

Resume

Mode

State Resume

Mode

Suspend

Power = PSPND

Suspend

Power = PSPND

Resume

Resume

FS Operation

State

Power = PFS_B

HS Operation

State

Power = PHS_B

(b) Self-powered Mode

Power OFF

Power OFF

Power ON

Hardware Reset

Idle Mode

Power = PRESET

CMB_STATE = 1 CMB_STATE = 0

Bus Reset

IDE Bus

Release

State

Power = PCOMBO

FS CONNECT

Disconnect

Mode

Vbus OFF

Vbus ON

Connect

Default

State

HS CONNECT

FS Enumeration

State

Resume

Power = PENUM_FS

Set Configuration

Suspend

Suspend

Configured

State

Resume

Suspend

HS Enumeration

State

Power = PENUM_HS

Resume

Set Configuration

Suspend

Suspend

Mode

Power = PSPND

Configured

State

Suspend

Resume

Suspend

Suspend

Mode

Power = PSPND

FS Operation

State

Power = PFS_S

Resume

HS Operation

State

Power = PHS_S

Resume

Preliminary Data Sheet S17100EJ2V0DS

11

Share Link: