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UPD720113 查看數據表(PDF) - NEC => Renesas Technology

零件编号
产品描述 (功能)
生产厂家
UPD720113
NEC
NEC => Renesas Technology NEC
UPD720113 Datasheet PDF : 32 Pages
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µPD720113
2.2 Terminology
Terms Used in Absolute Maximum Ratings
Parameter
Symbol
Meaning
Power supply voltage
VDD33
VDD25
AVDD
Indicates voltage range within which damage or reduced reliability will not
result when power is applied to a VDD pin.
Input voltage
VI
Indicates voltage range within which damage or reduced reliability will not
result when power is applied to an input pin.
Output voltage
VO
Indicates voltage range within which damage or reduced reliability will not
result when power is applied to an output pin.
Output current
IO
Indicates absolute tolerance values for DC current to prevent damage or
reduced reliability when current flows out of or into an output pin.
Operating temperature
TA
Indicates the ambient temperature range for normal logic operations.
Storage temperature
Tstg
Indicates the element temperature range within which damage or reduced
reliability will not result while no voltage or current are applied to the device.
Terms Used in Recommended Operating Range
Parameter
Symbol
Meaning
Power supply voltage
VDD33
VDD25
AVDD
Indicates the voltage range for normal logic operations to occur when VSS = 0
V.
High-level input voltage
VIH
Indicates the voltage, applied to the input pins of the device, which indicates
the high level state for normal operation of the input buffer.
* If a voltage that is equal to or greater than the “MIN.” value is applied, the
input voltage is guaranteed as high level voltage.
Low-level input voltage
VIL
Indicates the voltage, applied to the input pins of the device, which indicates
the low level state for normal operation of the input buffer.
* If a voltage that is equal to or less than the “MAX.” value is applied, the
input voltage is guaranteed as low level voltage.
Hysteresis voltage
VH
Indicates the differential between the positive trigger voltage and the negative
trigger voltage.
Input rise time
tri
Indicates allowable input signal transition time from 0.1 × VDD to 0.9 × VDD.
Input fall time
tfi
Indicates allowable input signal transition time from 0.9 × VDD to 0.1 × VDD.
8
Data Sheet S16618EJ3V0DS

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