M38503FCH 查看數據表（PDF） - Renesas Electronics

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M38503FCH

8-BIT CISC SINGLE-CHIP MICROCOMPUTER

Renesas Electronics 

REVISION HISTORY

3850 Group (Spec. H) User’s Manual

Rev. Date

Page

1.0 Aug. 30, 2001 –

1.1 Sep. 10, 2001 3-5

1.02 Aug. 29, 2003 1-6

1-7

1-7

1-37

1-38

2-103

2-104

2-105

2-106

2-107

3-4

3-20

3-22

3-24

1.03 Sep. 18, 2003 1-51

First edition issued

Description

Summary

Limits and test conditions into Table 3.1.5 are partly added.

Fig. 4 is partly revised.

Table 2 is partly added.

Note of Table 3 is added.

Fig. 42 is partly revised.

Fig. 43 is partly revised.

Clause name of “2.11 Flash memory mode” is revised.

Notes of Fig. 2.11.3 are partly revised.

Table 2.11.2 is partly revised.

Explanations of “[Beginning procedure]” of “2.11.6 CPU rewrite mode” are partly

added.

Explanations of this page are added.

Parameter of Table 3.1.4 is partly revised.

Fig. 3.2.16 is partly revised.

Fig. 3.2.20 is partly revised.

Fig. 3.2.24 is partly revised.

Fig. 52 is partly revised.

(1/1)

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