FSFR1800HSL 查看數據表（PDF） - Fairchild Semiconductor

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FSFR1800HSL

Advanced Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converters

Fairchild Semiconductor 

Electrical Characteristics

TA=25°C, LVCC, HVCC =17VDC and RT=26 k unless otherwise specified.

Symbol

Parameter

Conditions

Min.

MOSFET Section

BVDSS Drain-to-Source Breakdown Voltage

ID=200μA, TA=25C

500

ID=200μA, TA=125C

RDS(ON) On-State Resistance

FSFR1800HS/L

FSFR1700HS/L

VGS=10V, ID=3.0A

VGS=10V, ID=2.0A

trr

Body Diode Reverse

Recovery Time(7)

FSFR1800HS/L

FSFR1700HS/L

VGS=0V, IDIODE=7.0A,

dIDIODE/dt=100A/μs

VGS=0V, IDIODE=6.0A,

dIDIODE/dt=100A/μs

Supply Section

ILK

Offset Supply Leakage Current

HVCC=VCTR=500V

IQHVCC

IQLVCC

IOHVCC

Quiescent HVCC Supply Current

Quiescent LVCC Supply Current

Operating HVCC Supply Current (RMS Value)

(HVCCUV+) - 0.1V

(LVCCUV+) - 0.1V

fOSC=50KHz

No Switching

IOLVCC Operating LVCC Supply Current (RMS Value)

fOSC=50KHz

No Switching

UVLO Section

LVCCUV+

LVCCUV-

LVCCUVH

HVCCUV+

HVCCUV-

HVCCUVH

LVCC Supply Under-Voltage Positive Going Threshold (LVCC,START)

LVCC Supply Under-Voltage Negative Going Threshold (LVCC,STOP)

LVCC Supply Under-Voltage Hysteresis

HVCC Supply Under-Voltage Positive Going Threshold (HVCC,START)

HVCC Supply Under-Voltage Negative Going Threshold (HVCC,STOP)

HVCC Supply Under-Voltage Hysteresis

Oscillator & Feedback Section

VRT Output Voltage on RT Pin

fOSC Output Oscillation Frequency

DC Output Duty Cycle

RT=26k

11.2

8.9

8.2

7.8

1.5

47

48

Protection Section

VRT,RESET Threshold Voltage to Begin Restart

tDELAY,RESET Delay to Disable OSC Circuit After Protection

fosc=50kHz

VLINE On Threshold of Input Voltage

ILINE Hysteresis Current for Line UVLO

VOVP LVCC Over-Voltage Protection

VAOCP

tBAO

AOCP Threshold Voltage

AOCP Blanking Time(7)

VCS < VAOCP

VOCP

tBO

tDA

TSD

OCP Threshold Voltage

OCP Blanking Time(7)

VCS < VOCP

Delay Time (Low-Side) Detecting from VAOCP to Switch Off(7)

Thermal Shutdown Temperature(7)

0.07

2.38

7.5

21

-1.0

-0.64

1.0

120

Dead-Time Control Section

DT

Dead Time(8)

Notes:

7. This parameter, although guaranteed, is not tested in production.

8. These parameters, although guaranteed, are tested only in EDS (wafer test) process.

Typ. Max. Unit

540

V

0.77 0.95

1.00 1.25 

160

ns

160

50 μA

50 120 μA

100 200 μA

6

9 mA

100 200 μA

7

11 mA

2

4 mA

12.5 13.8 V

10.0 11.1 V

2.5

V

9.2 10.2 V

8.7 9.6 V

0.5

V

2.0 2.5 V

50 53 kHz

50 52 %

0.12 0.17 V

20

ms

2.50 2.62 V

9.5 11.5 μA

23

25

V

-0.9 -0.8 V

50

ns

-0.58 -0.52 V

1.5 2.0 μs

250 400 ns

135 150 C

350

ns

© 2011 Fairchild Semiconductor Corporation

FSFR1800 / FSFR1700-HS • Rev.1.0.0

5

www.fairchildsemi.com

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