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AS6C6264A-70SIN 查看數據表(PDF) - Alliance Semiconductor

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AS6C6264A-70SIN
ALSC
Alliance Semiconductor ALSC
AS6C6264A-70SIN Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
MARCH 2009
AS6C6264A
8K X 8 BIT LOW POWER CMOS SRAM
CHARACTERISTICS
All voltages are referenced to VSS = 0 V (ground).
All characteristics are valid in the power supply voltage range and in the operating temperature range specified.
Dynamic measurements are based on a rise and fall time of 5 ns, measured between 10 % and 90 % of VI, as well as
input levels of VIL = 0 V and VIH = 3 V. The timing reference level of all input and output signals is 1.5 V,
with the exception of the tdis-times, in which cases transition is measured } 200 mV from steady-state voltage.
a. Stresses greater than those listed under „Absolute Maximum Ratings“ may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at condition above those indicated in the
operational sections of this specification is not implied.Exposure to absolute maximum rating conditions for
extended periods may affect reliability
b. Maximum voltage is 7 V
c. Not more than 1 output should be shorted at the same time. Duration of the short circuit should not exceed 30 s.
MARCH/2009
ALLIANCE MEMORY
PAGE 3 of 10

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