P55N02LD 查看數據表（PDF） - Niko Semiconductor

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P55N02LD

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Niko Semiconductor 

NIKO-SEM

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P55N02LD

TO-252 (DPAK)

On-State Drain Current1

Drain-Source On-State

Resistance1

Forward Transconductance1

DYNAMIC

ID(ON)

RDS(ON)

gfs

VDS = 10V, VGS = 10V

VGS = 7V, ID = 24A

VGS = 10V, ID = 30A

VDS = 15V, ID = 30A

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge2

Gate-Source Charge2

Gate-Drain Charge2

Turn-On Delay Time2

Rise Time2

Turn-Off Delay Time2

Fall Time2

Ciss

Coss

Crss

Qg

Qgs

Qgd

td(on)

tr

td(off)

tf

VGS = 0V, VDS = 15V, f = 1MHz

VDS = 0.5V(BR)DSS, VGS = 10V,

ID = 30A

VDS = 15V, RL = 1Ω

ID ≅ 30A, VGS = 10V, RGS = 2.5Ω

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)

Continuous Current

Pulsed Current3

Forward Voltage1

IS

ISM

VSD

IF = IS, VGS = 0V

Reverse Recovery Time

trr

Peak Reverse Recovery Current

IRM(REC)

IF = IS, dlF/dt = 100A / µS

Reverse Recovery Charge

Qrr

1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％.

2Independent of operating temperature.

3Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P55N02LD”, DATE CODE or LOT #

55

11

10

16

A

14

mΩ

13

S

2700

500

pF

200

25

7

nC

11

7

7

nS

24

6

55

A

150

1.3 V

37

nS

200

A

0.043

µC

2

MAY-24-2001

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