MAX17030GTL 查看數據表（PDF） - Maxim Integrated

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MAX17030GTL

1/2/3-Phase Quick-PWM IMVP-6.5 VID Controllers

Maxim Integrated 

1/2/3-Phase Quick-PWM

IMVP-6.5 VID Controllers

When the main and other phase current-sense signals

(VCM = VCMP - VCMN and VCS = VCSP - VCSM) become

unbalanced, the transconductance amplifiers adjust the

other phase’s on-time, which increases or decreases

the phase inductor current until the current-sense sig-

nals are properly balanced:

t ON(SEC)

=

TSW

⎛

⎝⎜

VCCI

+ 0.075V ⎞

VIN

⎠⎟

=

TSW

⎛

⎝⎜

VFB

+ 0.075V

VIN

⎞

⎠⎟

+

TSW

⎛

⎝⎜

ICCIZ CCI

VIN

⎞

⎠⎟

= (Main On-time) + (Secondary Current Balance Correction)

where VCCI is the internal integrator node for each

slave’s current-balance integrator, and ZCCI is the

effective impedance at that node.

During phase overlap, tON is calculated based on

phase 1’s on-time requirements, but reduced by 33%

when operating with three phases.

For a 3-phase regulator, each phase cannot be

enabled until the other 2 phases have completed their

on-time and the minimum off-times have expired. As

such, the minimum period is limited by 3 x (tON +

tOFF(MIN)). Maximum tON is dependent on minimum VIN

and maximum output voltage:

TSW(MIN) = NPH x (tON(MAX) + tOFF(MIN))

where:

tON(MAX) = VFB(MAX)/VIN(MIN x TSW(MIN)

so:

TSW(MIN) = tOFF(MIN)/[1/NPH – VIN(MAX)/VIN(MIN)]

Hence, for a 7V input and 1.1V output, 500kHz is the

maximum switching frequency. Running at this limit is

not desirable as there is no room to allow the regulator

to make adjustments without triggering phase overlap.

For a 3-phase, high-current application with minimum

8V input, the practical switching frequency is 300kHz.

On-times translate only roughly to switching frequen-

cies. The on-times guaranteed in the Electrical

Characteristics are influenced by parasitics in the con-

duction paths and propagation delays. For loads above

the critical conduction point, where the dead-time effect

(LX flying high and conducting through the high-side

FET body diode) is no longer a factor, the actual

switching frequency (per phase) is:

fSW

=

(VOUT + VDIS )

( ) tON VIN + VDIS − VCHG

where VDIS and VCHG are the sum of the parasitic volt-

age drops in the inductor discharge and charge paths,

including MOSFET, inductor, and PCB resistances;

VCHG is the sum of the parasitic voltage drops in the

inductor charge path, including high-side switch,

inductor, and PCB resistances; and tON is the on-time

as determined above.

Current Sense

The MAX17030/MAX17036 sense the output current of

each phase allowing the use of current-sense resistors

on inductor DCR as the current-sense element. Low-

offset amplifiers are used for current balance, voltage-

positioning gain, and current limit.

Using the DC resistance (RDCR) of the output inductor

allows higher efficiency. The initial tolerance and tem-

perature coefficient of the inductor’s DCR must be

accounted for in the output-voltage droop-error budget

and current monitor. This current-sense method uses

an RC filtering network to extract the current information

from the output inductor (see Figure 4). The RC network

should match the inductor’s time constant (L/RDCR):

R CS

=

⎛

⎝⎜

R2 ⎞

R1+ R2 ⎠⎟

RDCR

and:

R CS

=

L

CEQ

⎡1

⎣⎢R1

+

1⎤

R2 ⎦⎥

where RCS is the required current-sense resistance,

and RDCR is the inductor’s series DC resistance. Use

the typical inductance and RDCR values provided by

the inductor manufacturer. To minimize the current-

sense error due to the current-sense inputs’ bias current

(ICSP_ and ICSN_), choose R1//R2 to be less than 2kΩ

and use the above equation to determine the sense

capacitance (CEQ). Choose capacitors with 5% toler-

ance and resistors with 1% tolerance specifications.

Temperature compensation is recommended for this

current-sense method. See the Voltage Positioning and

Loop Compensation section for detailed information.

When using a current-sense resistor for accurate out-

put-voltage positioning, the circuit requires a differential

RC filter to eliminate the AC voltage step caused by the

equivalent series inductance (LESL) of the current-

sense resistor (see Figure 4). The ESL induced voltage

step might affect the average current-sense voltage.

The RC filter’s time constant should match the LESL/

RSENSE time constant formed by the current-sense

resistor’s parasitic inductance:

L ESL

R SENSE

=

CEQREQ

______________________________________________________________________________________ 21

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