UJA1075ATW/5V0 查看數據表（PDF） - NXP Semiconductors.

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UJA1075ATW/5V0

High-speed CAN/LIN coresystem basis chip

NXP Semiconductors. 

NXP Semiconductors

UJA1075A

High-speed CAN/LIN core system basis chip

6.1 System Controller

6.1.1 Introduction

The system controller manages register configuration and controls the internal functions

of the SBC. Detailed device status information is collected and presented to the

microcontroller. The system controller also provides the reset and interrupt signals.

The system controller is a state machine. The SBC operating modes, and how transitions

between modes are triggered, are illustrated in Figure 3. These modes are discussed in

more detail in the following sections.

UJA1075A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 02 — 28 January 2011

© NXP B.V. 2011. All rights reserved.

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