QL8X12B-0PF100C 查看數據表（PDF） - QuickLogic Corporation

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QL8X12B-0PF100C

pASIC 1 Family Very-High-Speed CMOS FPGA

QuickLogic Corporation 

QL8X12B

ABSOLUTE MAXIMUM RATINGS

Supply Voltage.................................. –0.5 to 7.0V

Input Voltage ....................... –0.5 to VCC +0.5V

ESD Pad Protection................................... ±2000V

DC Input Current ...................................... ±20 mA

Latch-up Immunity ................................ ±200 mA

Storage Temperature....... –65°C to + 150°C

Lead Temperature................................... 300°C

OPERATING RANGE

Symbol

Parameter

Military

Industrial Commercial Unit

Min Max Min Max Min Max

VCC Supply Voltage

4.5 5.5 4.5 5.5 4.75 5.25 V

TA

Ambient Temperature

-55

-40

85

0

70 °C

TC

Case Temperature

125

°C

-X Speed Grade

0.4 2.75 0.46 2.55

K

Delay Factor -0 Speed Grade 0.39 1.82 0.4 1.67 0.46 1.55

-1 Speed Grade 0.39 1.56 0.4 1.43 0.46 1.33

-2 Speed Grade

0.4 1.35 0.46 1.25

4

DC CHARACTERISTICS over operating range

Symbol Parameter

Conditions

VIH

Input HIGH Voltage

VIL

Input LOW Voltage

IOH = -4 mA

VOH

Output HIGH Voltage

IOH = -8 mA

IOH = -10 µA

VOL

Output LOW Voltage

IOL = 12 mA*

IOL = 10 µA

II

Input Leakage Current

VI = VCC or GND

IOZ

3-State Output Leakage Current

VI = VCC or GND

CI

Input Capacitance [1]

IOS

Output Short Circuit Current [2]

VO = GND

VO = VCC

ICC

D.C. Supply Current [3]

VI, VIO = VCC or GND

Min Max Unit

2.0

V

0.8 V

3.7

V

2.4

V

VCC-0.1

V

0.4 V

0.1 V

-10

10 µA

-10

10 µA

10 pF

-10

-80 mA

30

140 mA

10 mA

*IOL = 12 mA for commercial range only. IOL = 8 mA for the industrial and military ranges.

Notes:

[1] Capacitance is sample tested only. CI = 20 pF max on I/(SI).

[2] Only one output at a time. Duration should not exceed 30 seconds.

[3] Commercial temperature grade only. Maximum Icc for industrial grade is 15mA and for military grade is

20 mA. For AC conditions use the formula described in the Section 9 — Power vs Operating Frequency.

[4] Stated timing for worst case Propagation Delay over process variation at VCC = 5.0V and TA = 25°C.

Multiply by the appropriate Delay Factor, K, for speed grade, voltage and temperature settings as specified

in the Operating Range.

[5] These limits are derived from a representative selection of the slowest paths through the pASIC logic cell

including net delays. Worst case delay values for specific paths should be determined from timing analysis

of your particular design .

4-9

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