MB89P657APF-106 查看數據表（PDF） - Fujitsu
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MB89P657APF-106 Datasheet PDF : 52 Pages
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MB89650AR Series
(Continued)
• External interrupt 1
Four independent channels with edge detection function
• External interrupt 2 (wake-up function)
Twelve “L” level-interrupt channels
• Watch prescaler
• LCD controller/driver: 16 to 32 segments × 2 to 4 commons
• Power-on reset function
• Low-power consumption modes (subclock mode, watch mode, sleep mode, and stop mode)
• SQFP-100 and QFP-100 packages
s PRODUCT LINEUP
Part number
MB89653AR MB89655AR MB89656AR MB89657AR MB89P657A MB89PV650A
Parameter
Classification
Mass production products
(mask ROM products)
One-time
PROM product
Piggyback/
evaluation product
(for evaluation and
development)
ROM size
8 K × 8 bits
(internal
mask
ROM)
16 K × 8 bits
(internal
mask
ROM)
24 K × 8 bits 32 K × 8 bits
(internal
(internal
mask
mask
ROM)
ROM)
32 K × 8 bits
(internal PROM,
programming
with general-
purpose EPROM
programmer)
32 K × 8 bits
(external ROM)
RAM size
256 × 8 bits 512 × 8 bits 768 × 8 bits
1 K × 8 bits
LCD display
RAM
16 × 8 bits
CPU functions
Ports
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
Input ports:
Output ports:
I/O ports:
Total:
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4 µs/10 MHz to 6.4 µs/10 MHz, 61.0 µs/32.768 kHz
3.6 µs/10 MHz to 57.6 µs/10 MHz, 549.3 µs/32.768 kHz
8 (All also serve as peripherals.)
8 (All also serve as peripherals.)
48 (All also serve as peripherals.)
64
8-bit timer 1,
8-bit timer 2
8-bit timer 3,
8-bit timer 4
8-bit timer operation (toggled output capable, operating clock cycle: 0.8 to 12.8 µs)
16-bit timer operation (toggled output capable, operating clock cycle: 0.8 to 12.8 µs)
2 output channels are enabled when operating as an 8-bit timer.
8-bit timer operation (toggled output capable, operating clock cycle: 0.8 to 12.8 µs)
16-bit timer operation (toggled output capable, operating clock cycle: 0.8 to 12.8 µs)
2 output channels are enabled when operating as an 8-bit timer.
Clock timer
8-bit PWM
timer 1,
8-bit PWM
timer 2
21 bits × 1 (in main clock mode)/15 bits × 1 (at 32.768 kHz)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 µs to 3.3 ms)
8-bit resolution PWM operation (conversion cycle: 102 µs to 839 ms)
Both 8-bit PWM timer 1 and 8-bit PWM timer 2 can output 2 channels.
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2
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