AS3843N13 查看數據表（PDF） - Astec Semiconductor => Silicon Link
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AS3843N13 Datasheet PDF : 20 Pages
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AS384x
Current Mode Controller
the following paragraphs. The basic operation of
the oscillator is as follows:
A simple RC network is used to program the fre-
quency and the maximum duty ratio of the
AS3842 output. See Figure 15. Timing capacitor
(CT) is charged through timing resistor (RT) from
the fixed 5.0 V at VREG. During the charging time,
the OUT (pin 6) is high. Assuming that the output
is not terminated by the PWM latch, when the
voltage across CT reaches the upper oscillator
trip point (Å3.0 V), an internal current sink from
pin 4 to ground is turned on and discharges CT
towards the lower trip point. During this dis-
charge time, an internal clock pulse blanks the
output to its low state. When the voltage across
CT reaches the lower trip point (Å1.3 V), the cur-
rent sink is turned off, the output goes high, and
the cycle repeats. Since the output is blanked
during the discharge of CT, it is the discharge
time which controls the output deadtime and
hence, the maximum duty ratio.
The nature of the AS3842 oscillator circuit is such
that, for a given frequency, many combinations of
RT and CT are possible. However, only one value
of RT will yield the desired maximum duty ratio at
a given frequency. Since a precise maximum
duty ratio clamp is critical for many power supply
designs, the oscillator discharge current is
trimmed in a unique manner which provides sig-
nificantly improved tolerances as explained later
in this section. In addition, the AS3844/5 options
have an internal flip-flop which effectively blanks
every other output pulse (the oscillator runs at
twice the output frequency), providing an
absolute maximum 50% duty ratio regardless of
discharge time.
1.3.1 Selecting timing components RT
and CT
The values of RT and CT can be determined
mathematically by the following expressions:
CT
=
D
RT
ƒOSC
ln
KL
KH
= 1.63D
R T ƒOSC
(1)
8
RT
4
CT
7 VCC
5 V REG
PWM
CLOCK
OSCILLATOR
ID
AS3842
6 OUTPUT
CT
OUTPUT
CT
OUTPUT
5 GND
Figure 15. Oscillator Set-up and Waveforms
ASTEC Semiconductor
12
Large RT/Small CT
Small RT/ Large CT
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