74AHC30-Q100 查看數據表（PDF） - NXP Semiconductors.
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74AHC30-Q100 Datasheet PDF : 15 Pages
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NXP Semiconductors
74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7.
Symbol Parameter Conditions
25 C
40 C to +85 C
Min Typ[1] Max Min
Max
CPD
power
fi = 1 MHz;
dissipation VI = GND to VCC
capacitance
[3] -
10
-
-
-
74AHCT30-Q100; VCC = 4.5 V to 5.5 V
tpd
propagation A, B, C, D, E, F, G, H to [2]
delay
Y; see Figure 6 and 7
CL = 15 pF
CL = 50 pF
CPD
power
fi = 1 MHz;
dissipation VI = GND to VCC
capacitance
- 3.3 6.5 1.0
7.5
- 4.7 8.5 1.0
9.5
[3] -
12
-
-
-
40 C to +125 C Unit
Min
Max
-
- pF
1.0
8.0 ns
1.0
10.5 ns
-
- pF
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
11. Waveforms
VI
A, B, C, D,
E, F, G, H
input
GND
VOH
Y output
VOL
VM
tPHL
VM
tPLH
mna491
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
Table 8. Measurement points
Type
74AHC30-Q100
74AHCT30-Q100
Input
VM
0.5 VCC
1.5 V
Output
VM
0.5 VCC
0.5 VCC
74AHC_AHCT30_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 November 2013
© NXP B.V. 2013. All rights reserved.
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