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UPD78C11AL-XXX 查看數據表(PDF) - NEC => Renesas Technology

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UPD78C11AL-XXX
NEC
NEC => Renesas Technology NEC
UPD78C11AL-XXX Datasheet PDF : 66 Pages
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µPD78C10A,78C11A,78C12A
1.1 LIST OF PIN FUNCTION (2/2)
Pin Name
I/O
Function
MODE0
MODE1
(Mode)
NMI
(Non-Maskable
Interrupt)
INT1
(Interrupt
Request)
AN7 to AN0
(Analog Input)
Input-output
Input
Input
Input
µPD78C11A and 78C12A sets MODE0 pin to “0” (low level), and MODE1 pin to “1” (high
level*)
µPD78C10A allows you to set MODE0, MODE1 pins to select 4K, 16K, or 64K bytes for the
size of the memory which is installed externally.
MODE0 MODE1 External Memory
0
0
4K bytes
1
0
16K bytes
1
1
64K bytes
Also, when each of MODE0 and MODE1 pins is set to “1”*, it is synchronized to ALE to output
a control signal.
Non-maskable interrupt input pin of the edge trigger (falling edge)
A maskable interrupt input pin of the edge trigger (rising edge). Also, it can be used as a
zero-cross detection pin for AC input.
8 pins of analog input to A/D converter. AN7 to AN4 can be used as edge detection (falling
edge) input.
VAREF
(Reference
Voltage)
Input
A common pin serving both as a standard voltage input pin for A/D converter and as a
control pin for A/D converter operation.
AVDD
(Analog VDD)
Power supply pin for A/D converter.
AVSS
(Analog VSS)
X1, X2
5
(Crystal)
RESET
(Reset)
STOP
(Stop)
VDD
Input
GND pin for A/D converter.
Crystal connection pins for system clock oscillation. X1 should be input when a clock is
supplied from outside. Input the clock of the reverse phase of X1 to X2.
Low-level active system reset input.
Control signal input pin in hardware STOP mode. The oscillation stops when a clock is
supplied from outside.
Positive power supply pin.
VSS
GND pin.
* Pull-up. Pull-up resister R is 4 [k] R 0.4 tCYC [k] (tCYC is ns unit).
Remarks The µPD78C11A and µPD78C12A are pull-up resistor incorporation specifiable by mask option at ports
A, B and C.
8

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