AT88SC0104C-PI 查看數據表（PDF） - Atmel Corporation

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AT88SC0104C-PI

CryptoMemory 1 Kbit

Atmel Corporation 

AT88SC0104C

Synchronous

2-wire Serial Interface

Communication

Security Modes

The synchronous mode is the default after powering up VCC due to the internal pull-up

on RST. For embedded applications using CryptoMemory in standard plastic packages,

this is the only communication protocol.

• Power-up VCC, RST goes high also.

• After stable VCC, CLK-SCL and I/O-SDA may be driven.

Figure 8. Synchronous 2-wire Protocol

Vcc

I/O-SDA

RST

CLK-SCL

1 2345

Note: Five clock pulses must be sent before the first command is issued.

Communications between the device and host operate in three basic modes. Standard

mode is the default mode for the device after power-up. Authentication mode is acti-

vated by a successful authentication sequence. Encryption mode is activated by a

successful encryption activation following a successful authentication.

Table 6. Communication Security Modes(1)

Mode

Configuration Data

User Data

Passwords

Standard

Clear

Clear

Clear

Authentication

Clear

Clear

Encrypted

Encryption

Clear

Encrypted

Encrypted

Note:

1. Configuration data include viewable areas of the Configuration Zone except the passwords:

MDC: Modification Detection Code.

MAC: Message Authentication Code.

Data Integrity Check

MDC(1)

MAC(1)

MAC(1)

Security Options

Anti-tearing

In the event of a power loss during a write cycle, the integrity of the device’s stored data

may be recovered. This function is optional: the host may choose to activate the anti-

tearing function, depending on application requirements. When anti-tearing is active,

write commands take longer to execute, since more write cycles are required to com-

plete them, and data are limited to eight bytes.

Data are written first to a buffer zone in EEPROM instead of the intended destination

address, but with the same access conditions. The data are then written in the required

location. If this second write cycle is interrupted due to a power loss, the device will

automatically recover the data from the system buffer zone at the next power-up.

In 2-wire mode, the host is required to perform ACK polling for up to 8 ms after write

commands when anti-tearing is active. At power-up, the host is required to perform ACK

polling, in some cases for up to 2 ms, in the event that the device needs to carry out the

data recovery process.

9

2021GS–SMEM–7/06

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