W77C32-25 查看數據表（PDF） - Winbond
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W77C32-25 Datasheet PDF : 71 Pages
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Preliminary W77C32
Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low order
address/data bus during accesses to external memory.
Stack Pointer
Bit:
Mnemonic: SP
7
SP.7
6
SP.6
5
SP.5
4
SP.4
3
SP.3
2
1
0
SP.2 SP.1 SP.0
Address: 81h
The Stack Pointer stores the Scratchpad RAM address where the stack begins. In other words, it
always points to the top of the stack.
Data Pointer Low
Bit:
7
6
5
4
3
2
1
0
DPL.7 DPL.6 DPL.5 DPL.4 DPL.3 DPL.2 DPL.1 DPL.0
Mnemonic: DPL
Address: 82h
This is the low byte of the standard 8052 16-bit data pointer.
Data Pointer High
Bit:
7
DPH.7
6
DPH.6
5
DPH.5
4
DPH.4
3
DPH.3
2
DPH.2
1
DPH.1
0
DPH.0
Mnemonic: DPH
Address: 83h
This is the high byte of the standard 8052 16-bit data pointer.
Data Pointer Low1
Bit:
7
6
5
4
3
2
1
0
DPL1.7 DPL1.6 DPL1.5 DPL1.4 DPL1.3 DPL1.2 DPL1.1 DPL1.0
Mnemonic: DPL1
Address: 84h
This is the low byte of the new additional 16-bit data pointer that has been added to the W77C32. The
user can switch between DPL, DPH and DPL1, DPH1 simply by setting register DPS = 1. The
instructions that use DPTR will now access DPL1 and DPH1 in place of DPL and DPH. If they are not
required they can be used as conventional register locations by the user.
Data Pointer High1
Bit:
7
6
5
4
3
2
1
0
DPH1.7 DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0
Mnemonic: DPH1
Address: 85h
Publication Release Date: March 1999
-9-
Revision A1
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