LTC1064C 查看數據表（PDF） - Linear Technology
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LTC1064C Datasheet PDF : 20 Pages
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LTC1064
ELECTRICAL CHARACTERISTICS (Complete Filter) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at VS = ±5V, TA = 25°C, TTL clock input level, unless otherwise specified.
PARAMETER
Center Frequency Range, fO
Input Frequency Range
Clock-to-Center Frequency
Ratio, fCLK/fO
LTC1064
LTC1064A (Note 2)
LTC1064
LTC1064A (Note 2)
Clock-to-Center Frequency
Ratio, Side-to-Side Matching
Clock-to-Center Frequency
Ratio, fCLK/fO (Note 3)
LTC1064
LTC1064A (Note 2)
LTC1064
LTC1064A (Note 2)
Q Accuracy
LTC1064
LTC1064 A (Note 2)
fO Temperature Coefficient
Q Temperature Coefficient
DC Offset Voltage
Clock Feedthrough
Maximum Clock Frequency
Power Supply Current
VOS1 (Table 1)
VOS2 (Table 1)
VOS3 (Table 1)
CONDITIONS
VS = ±8V, Q ≤ 3
fCLK = 1MHz, fO = 20kHz, Pin 17 High
Sides A, B, C: Mode 1,
R1 = R3 = 5k, R2 = 5k, Q = 10,
Sides D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k
Same as Above, Pin 17 Low, fCLK = 1MHz
fO = 10kHz
Sides A, B, C
Side D
fCLK = 1MHz
fCLK = 4MHz, fO = 80kHz, Pin 17 High
Sides A, B, C: Mode 1, VS = ±7.5V
R1 = R3 = 50k, R2 = 5k, Q = 5
Side D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k, fCLK = 4MHz
Same as Above, Pin 17 Low
fCLK = 4MHz, fO = 40kHz
Sides A, B, C: Mode 1, Q = 10
Side D: Mode 3, fCLK = 1MHz
Mode 1, 50:1, fCLK < 2MHz
Mode 1, 100:1, fCLK < 2MHz
Mode 3, fCLK < 2MHz
fCLK = 1MHz, 50:1 or 100:1
fCLK = 1MHz, 50:1 or 100:1
fCLK = 1MHz, 50:1 or 100:1
fCLK < 1MHz
Mode 1, Q < 5, VS ≥ ±5V
MIN
TYP
MAX
UNITS
0.1 to 140
kHz
0 to 1
MHz
50 ± 0.3
%
●
50 ± 0.8
%
●
50 ± 0.9
%
100 ± 0.3
%
●
100 ± 0.8
%
●
100 ± 0.9
0.4
%
●
1
%
50 ± 0.6
%
50 ± 1.3
%
●
●
●
●
●
9
●
100 ± 0.6
±2
±3
±1
±5
±5
2
3
3
0.2
7
12
100 ± 1.3
6
8
15
45
45
23
26
%
%
%
%
ppm/°C
ppm/°C
ppm/°C
mV
mV
mV
mVRMS
MHz
mA
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Contact LTC Marketing.
Note 3: Not tested, guaranteed by design.
Table 1. Output DC Offsets, One 2nd Order Section
MODE
1
1b
2
3
VOSN
PINS 2, 11, 14, 23
VOS1 [(1/Q) + 1 + ⏐⏐HOLP⏐⏐] – VOS3/Q
VOS1 [(1/Q) + 1 + (R2/R1)] – VOS3/Q
VOS1 [(1 + (R2/R1) + (R2/R3) + (R2/R4) – VOS3(R2/R3)]
× [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)]
VOS2
VOSBP
PINS 3, 10, 15, 22
VOS3
VOS3
VOS3
VOS3
VOSLP
PINS 4, 9, 16, 21
VOSN – VOS2
~(VOSN – VOS2)[1 + (R5/R6)]
VOSN – VOS2
VOS1[1 + (R4/R1) + (R4/R2) + (R4/R3)]
– VOS2(R4/R2) – VOS3(R4/R3)
1064fb
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