DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LTC1064C 查看數據表(PDF) - Linear Technology

零件编号
产品描述 (功能)
生产厂家
LTC1064C Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC1064
APPLICATIONS INFORMATION
ANALOG CONSIDERATIONS
Grounding and Bypassing
The LTC1064 should be used with separated analog and
digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Pin 7 (V +) should be bypassed to the ground plane with a
0.1µF ceramic capacitor with leads as short as possible.
Pin 19 (V ) should be bypassed with a 0.1µF ceramic
capacitor. For single supply applications, V can be tied to
the analog ground plane.
For good noise performance, V + and V must be free of
noise and ripple.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
Figure 2 shows an example of an ideal ground plane
design for a 2-sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Protoboards are not
recommended.
Buffering the Filter Output
When driving coaxial cables and 1× scope probes, the
filter output should be buffered. This is important espe-
cially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise, distor-
tion, Q and gain measurements. When 10 × probes are
used, buffering is usually not required. An inverting buffer
is recommended especially when THD tests are per-
formed. As shown in Figure 3, the buffer should be
adequately bypassed to minimize clock feedthrough.
ANALOG
GROUND
PLANE
7.5V
0.1µF
CERAMIC
1 PIN 1 IDENT
2
3
4
5
LTC1064
6
7
8
9
10
11
12
24
23
22
21
20 –7.5V
VIN
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLE-
5k
SIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
0.1µF CERAMIC
19
18
CLOCK
17
DIGITAL
GROUND
16
PLANE
(SINGLE POINT
15
GROUND)
14
NOTE: CONNECT ANALOG AND DIGITAL
13
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
Figure 2. Example Ground Plane Breadboard Technique for LTC1064
1064 F02
1064fb
7

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]