MTW14N50E 查看數據表（PDF） - ON Semiconductor
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MTW14N50E Datasheet PDF : 8 Pages
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MTW14N50E
15
500
TJ = 25°C
12
VDS
ID = 14 A
VDS = 400 V
400
QT
9
300
Q1
6
200
Q2
3
VGS
100
0
Q3
0
0 10 20 30 40 50 60 70 80 90 100
QT, TOTAL CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
10000
2000
1000
TJ = 25°C
ID = 14 A
VDD = 250 V
VGS = 10 V
200
100
tr
td(off)
td(on)
20
tf
10
12
10 20
100 200
1000
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
14
TJ = 25°C
12
VGS = 0 V
dIS/dt = 100 A/µs
10
8
6
4
2
0
0
0.2
0.4
0.6
0.8
1
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance–General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10µs. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) – TC)/(RθJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of
drain–to–source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
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