UT62256BPC-70LI 查看數據表（PDF） - Utron Technology Inc

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UT62256BPC-70LI

32K X 8 BIT LOW POWER (6T) CMOS SRAM

Utron Technology Inc 



Rev. 1.1

UTRON

UT62256B(I)

32K X 8 BIT LOW POWER (6T) CMOS SRAM

DATA RETENTION CHARACTERISTICS (TA = -40℃ to 85℃)

PARAMETER

Vcc for Data Retention

Data Retention Current

Chip Disable to Data

Retention Time

Recovery Time

tRC* = Read Cycle Time

SYMBOL TEST CONDITION

VDR

CE ≧ VCC-0.2V

IDR

Vcc=3V

CE ≧ VCC-0.2V

tCDR See Data Retention

Waveforms (below)

tR

DATA RETENTION WAVEFORM

VCC

CE

4.5V

tCDR

Data Retention Mode

VDR ≧ 2V

MIN. TYP. MAX. UNIT

2.0 - 5.5 V

-L -

- LL -

0

1 20 µA

0.5 3 µA

- - ns

tRC*

-

- ns

4.5V

tR

VSS

CE ≧ VCC -0.2V

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC.

P80026

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

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