SN8P2501B 查看數據表（PDF） - Sonix Technology Co., Ltd

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SN8P2501B

SONiX 8-Bit Micro-Controller

Sonix Technology Co., Ltd 

SN8P2501B

8-Bit Micro-Controller

1 PRODUCT OVERVIEW

1.1 FEATURES

♦ Memory configuration

OTP ROM size: 1K * 16 bits.

RAM size: 48 * 8 bits.

Four levels stack buffer

♦ I/O pin configuration

Bi-directional: P0, P1, P2, P5.

Input only: P1.1.

Programmable open-drain: P1.0.

Wakeup: P0, P1 level change trigger

Pull-up resisters: P0, P1, P2, P5.

External Interrupt trigger edge:

P0.0 controlled by PEDGE register.

♦ 3-Level LVD.

Reset system and power monitor.

♦ Powerful instructions

One clocks per instruction cycle (1T)

Most of instructions are one cycle only.

All ROM area JMP instruction.

All ROM area CALL address instruction.

All ROM area lookup table function (MOVC)

♦ Three interrupt sources

One internal interrupts: T0, TC0.

One external interrupts: INT0.

♦ Two 8-bit Timer/Counter

T0: Basic Timer with 0.5sec RTC.

TC0: Auto-reload timer/Counter/Buzzer output

♦ On chip watchdog timer and clock source is internal

low clock RC type (16KHz @3V, 32KHz @5V).

♦ Dual system clocks

External high clock: RC type up to 10 MHz

External high clock: Crystal type up to 16 MHz

Internal high clock: 16MHz RC type. Fcpu is limited to

Fosc/4~Fosc/16.

Internal low clock: RC type 16KHz(3V), 32KHz(5V)

♦ Operating modes

Normal mode: Both high and low clock active

Slow mode: Low clock only

Sleep mode: Both high and low clock stop

Green mode: Periodical wakeup by T0 Timer

♦ Package (Chip form support)

PDIP 14 pins

SOP 14 pins

SSOP 16 pins

) Features Selection Table

CHIP

ROM

(word)

RAM

(Byte)

Stack

Timer

T0 TC0

LVD

Level

IHRC

I/O

Green

Mode

Slow

Mode

PWM

Buzzer

Wake-up

Pin No.

Package

SN8P2501A 1K 48 4 V V 1 V 12 V V V

5 DIP14/SOP14/SSOP16

SN8P2501B 1K 48 4 V V 3 V 12 V V V

5 DIP14/SOP14/SSOP16

SONiX TECHNOLOGY CO., LTD

Page 7

Preliminary Version 0.5

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