AD745AN 查看數據表（PDF） - Analog Devices
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AD745AN Datasheet PDF : 12 Pages
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Design Considerations for I-to-V Converters
There are some simple rules of thumb when designing an I-V
converter where there is significant source capacitance (as with a
photodiode) and bandwidth needs to be optimized. Consider the
circuit of Figure 37. The high frequency noise gain (1 + CS/CL)
is usually greater than five, so the AD745, with its higher slew
rate and bandwidth is ideally suited to this application.
Here both the low current and low voltage noise of the AD745
can be taken advantage of, since it is desirable in some instances
to have a large RF (which increases sensitivity to input current
noise) and, at the same time, operate the amplifier at high noise
gain.
RF
INPUT SOURCE: PHOTO DIODE,
ACCELEROMETER, ECT.
CL
AD745
1µF +
0.01
µF
1
–12V
2
0.01
3
µF
4
+12V
5
DIGITAL
INPUTS
6
7
–12V
8
0.01µF
+12V
AD1862
20 BIT D/A
CONVERTER
16
0.01µF
15
+12V
14 10µF
13 +
ANALOG
COMMON
0.1µF
OUTPUT
12
11
3kΩ
10
TOP VIEW
9
AD745
0.1µF
–12V
3 POLE
LOW
PASS
FILTER
DIGITAL
COMMON
100pF
2000pF
IS
RB
CS
AD745
Figure 37. A Model for an l-to-V Converter
In this circuit, the RF CS time constant limits the practical
bandwidth over which flat response can be obtained, in fact:
fB ≈
fC
2π RFCS
where:
fB = signal bandwidth
fC = gain bandwidth product of the amplifier
With CL ≈ 1/(2 π RF CS) the net response can be adjusted to a
provide a two pole system with optimal flatness that has a corner
frequency of fB. Capacitor CL adjusts the damping of the
circuit’s response. Note that bandwidth and sensitivity are
directly traded off against each other via the selection of RF. For
example, a photodiode with CS = 300 pF and RF = 100 kΩ will
have a maximum bandwidth of 360 kHz when capacitor
CL ≈ 4.5 pF. Conversely, if only a 100 kHz bandwidth were
required, then the maximum value of RF would be 360 kΩ and
that of capacitor CL still ≈ 4.5 pF.
In either case, the AD745 provides impedance transformation,
the effective transresistance, i.e., the I/V conversion gain, may be
augmented with further gain. A wideband low noise amplifier
such as the AD829 is recommended in this application.
This principle can also be used to apply the AD745 in a high
performance audio application. Figure 38 shows that an I-V
converter of a high performance DAC, here the AD1862, can be
designed to take advantage of the low voltage noise of the
AD745 (2.9 nV/͙Hz) as well as the high slew rate and
bandwidth provided by decompensation. This circuit, with
component values shown, has a 12 dB/octave rolloff at 728 kHz,
with a passband ripple of less than 0.001 dB and a phase
deviation of less than 2 degrees @ 20 kHz.
Figure 38. A High Performance Audio DAC Circuit
An important feature of this circuit is that high frequency
energy, such as clock feedthrough, is shunted to common via a
high quality capacitor and not the output stage of the amplifier,
greatly reducing the error signal at the input of the amplifier and
subsequent opportunities for intermodulation distortions.
40
30
UNBALANCED
20
10 BALANCED
2.9nV/√ Hz
0
10
100
INPUT CAPACITANCE – pF
1000
Figure 39. RTI Noise Voltage vs. Input Capacitance
BALANCING SOURCE IMPEDANCES
As mentioned previously, it is good practice to balance the
source impedances (both resistive and reactive) as seen by the
inputs of the AD745. Balancing the resistive components will
optimize dc performance over temperature because balancing
will mitigate the effects of any bias current errors. Balancing
input capacitance will minimize ac response errors due to the
amplifier’s input capacitance and, as shown in Figure 39, noise
performance will be optimized. Figure 40 shows the required
external components for noninverting (A) and inverting (B)
configurations.
REV. C
–11–
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